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Senior Asics Jobs

41 open positions · Updated 1 month ago

Average salary: 154.6k–218.0k/yr

Showing 20 of 41 positions

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Irvine, CA $125k–$175k/yr Published 1 month ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enabling global connectivity.

SpaceX Austin, TX Published 1 month ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Sunnyvale, CA $135k–$185k/yr Published 1 month ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. IC Package Design Engineer (Silicon Engineering) Visa

SpaceX Irvine, CA $160k–$225k/yr Published 3 months ago

SIWave High-Speed Design RF Design ADS Power integrity

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Sr. IC Package Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. IC Package Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

SpaceX Austin, TX Published 1 month ago

SIWave BGA ADS HFSS RFIC

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Sunnyvale, CA $170k–$240k/yr Published 1 month ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 1 month ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$230k/yr Published 1 month ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$230k/yr Published 1 month ago

VMM Python UVM OVM

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Austin, TX Published 1 month ago

FinFET Scripting ASIC EDA tools physical design

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Sunnyvale, CA $170k–$230k/yr Published 1 month ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 1 month ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 3 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Irvine, CA $160k–$225k/yr Published 3 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Palo Alto, CA $170k–$235k/yr Published 2 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. SI/PI Engineer - Serdes, Satellites (Starlink) Visa

SpaceX Sunnyvale, CA $140k–$190k/yr Published 4 months ago

C++ DDR4 ADS PCB Physics

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Silicon Product and Test Engineer

Drive post-silicon productization of bitcoin mining ASICs in a cross-functional role at Block.

Block Bay Area, CA, United States of America $139k–$245.4k/yr Published 6 months ago

DOE ATE yield optimization silicon characterization JMP

Flexible on stack

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Sr. Signal and Power Integrity Engineer, Satellites (Starlink) Visa

SpaceX Sunnyvale, CA $140k–$190k/yr Published 4 months ago

DDR4 ADS Physics DSP HFSS

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Sr. RTL Design Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 3 months ago

Verilog AHB ASIC Python System Verilog

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 1 month ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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