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Lpddr Jobs at Graphcore

10 open positions · Updated 1 week ago

10 of 197 open roles Mid 3, Principal 3, Senior 2, Director 1, Staff 1 0–10 yrs experience Austin, Texas, United States +3 more Full-time newest 1 week ago

Also hiring: Ethernet PCIe DDR HBM Python C++

10 Lpddr roles across 1 company, most in AI/ML

Who is hiring (1 companies)

Graphcore (10)

Role types

AI/ML (10)

Work arrangement: 1 hybrid · 5 on-site · 4 not stated

Counts are open roles Joblaze currently tracks on company career pages for this exact skill/location; salaries are advertised minimums, annual, converted to USD.

Showing 10 of 10 positions

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Silicon Physical Design Engineer

Join Graphcore as a Silicon Physical Design Engineer to work on cutting-edge AI superchips in a collaborative environment.

Graphcore Bristol, UK; Cambridge, UK Published 7 months ago

PCIe Floorplanning EDA LPDDR Physical Verification

Flexible on stack

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Staff Embedded SW/FW Engineer (Bringup) - Bengaluru

Join Graphcore as a Staff Embedded SW/FW Engineer to develop C code for validating high-performance AI chips in Bengaluru.

Graphcore Bengaluru, India Published 10 months ago

PCIe C++ ARM LPDDR FPGA

Flexible on stack

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SoC Architect

Shape the SoC architecture for Graphcore’s next generation AI acceleration platforms, influencing multiple AI silicon projects.

Graphcore Bristol, UK Published 1 month ago

PCIe on-chip networks RTL LPDDR SoC architecture

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Principal Embedded SW/FW Engineer (Bringup) - Bengaluru, multiple vacancies

Join Graphcore as a Principal Embedded SW/FW Engineer in Bengaluru, focusing on post-silicon validation of AI chips.

Graphcore Bengaluru, India Published 10 months ago

PCIe C++ ARM LPDDR FPGA

Flexible on stack

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Post Silicon Validation Engineer

Join Graphcore as a Post Silicon Validation Engineer to validate cutting-edge AI chips and mentor a collaborative engineering team.

Graphcore Bristol, UK Published 10 months ago

PCIe C++ ARM LPDDR FPGA

Flexible on stack

Apply →

Senior Debug Validation Engineer

Lead post-silicon debug and validation activities for next-generation AI compute silicon and systems at Graphcore.

Graphcore Bengaluru, India Published 2 months ago

PCIe C++ Lauterbach JTAG JLink

Flexible on stack

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Principal Debug Validation Engineer

Lead post-silicon debug and validation activities for next-generation AI compute silicon and systems at Graphcore.

Graphcore Bengaluru, India Published 2 months ago

PCIe C++ Lauterbach JTAG JLink

Flexible on stack

Apply →

Principal Debug Validation Engineer

Join a collaborative team to validate high-performance AI chips and support new product introductions in Austin.

Graphcore Austin, Texas, United States Published 2 months ago

PCIe C++ ARM LPDDR FPGA

Flexible on stack

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Debug Validation Engineer — Multiple Levels Hybrid

Drive post-silicon debug and validation for next-gen AI compute silicon at Graphcore, collaborating across engineering teams.

Graphcore Bristol, UK Published 2 months ago

PCIe C++ ARM JTAG LPDDR

Flexible on stack

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Director - Post-Silicon Validation (Functional)

Lead a team in validating cutting-edge AI chips and platforms at Graphcore's new AI Engineering Campus in Austin.

Graphcore Austin, Texas, United States Published 2 months ago

PCIe C++ ARM LPDDR FPGA

Flexible on stack

Apply →