Join a collaborative team to validate high-performance AI chips and support new product introductions in Austin.
Posted by employer 2 months ago
First seen on Joblaze 1 week ago
Last verified on the company career page 1 day ago
Not disclosed in this posting: compensation, visa sponsorship.
Joblaze summary
In this role, the Principal Debug Validation Engineer at Graphcore focuses on validating high-performance AI chips by designing and executing silicon validation tests, while also collaborating with cross-functional teams to ensure product readiness. Key skills include expertise in bare metal C/C++, Python, and a solid understanding of post-silicon validation processes. This position is ideal for experienced engineers with a background in embedded systems and a knack for problem-solving, particularly those who thrive in collaborative environments. The team emphasizes continuous improvement and innovation in testing methodologies.
Quick facts
- Is the Principal Debug Validation Engineer role remote?
- No — this is an on-site role in Austin, Texas, United States.
- How much experience is required?
- 5–10 years of relevant experience for this Principal Debug Validation Engineer role.
- Where is the role based?
- Graphcore is hiring for this position in Austin, Texas, United States.
- What's the tech stack?
- Joblaze extracted these technologies from the posting: AMBA, ARM, C++, DDR, Emulator, Ethernet.
- What seniority level is this role?
- Graphcore targets principal-level candidates for this position.
- Is this full-time or contract?
- Full-time for this Principal Debug Validation Engineer role at Graphcore.
From the original posting
Principal Embedded SW/FW Engineer (Bringup) - Austin, Tx, USA
Job Summary
We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms.
You will play a key role in supporting new product introductions and post-silicon validation.
Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes.
The Team
The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team.
Responsibilities and Duties
- Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon
- Deploy silicon validation tests on first silicon and debugging them
- Develop automated test framework and regression test suites in Python to optimize validation efficiency
- Collaborate closely with engineers from many other disciplines on a variety of topics
- Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies
- Analyse test results, identify and debug failures/defects
- Contribute to shared test and validation infrastructure
- Provide feedback to architects
Candidate Profile
Essential:
- Understanding of ML applications and their workloads
- A self-starter who can apply independent judgement
- A team player able to lead and support colleagues with difficult concepts
- Strong experience in Bare metal / embedded C/C++
- Excellent problem-solving, analytical & diagnostic skills
- Ability to work across teams and programming languages to find root causes of critical and complex issues
- Experience of the post-silicon validation process applied in digital ASIC environments
- Excellent communication skills and the ability to explain difficult concepts to resolve issues
Desirable
- 5 to 10 years’ experience
- Experience building and leading, multi-site teams
- Driver level experience with one or more of the following is highly desirable:
- PCIe
- Ethernet
- Memory technologies (LPDDR, DDR, HBM, …)
- Other peripherals such as I2C, I3C, SPI, …
- Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable.
- Experience of Arm CPUs, System IP and debug tools.
- Experience of AMBA protocols.
- Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,