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Compiler Engineer - Algorithmic Workloads Compilation

Design compiler IRs and strategies for algorithmic workloads at a cutting-edge AI computing company.

Location
Palo Alto, CA
Compensation
Not disclosed
Level
mid
Type
full time

Posted by employer 11 months ago

First seen on Joblaze 1 week ago

Last verified on the company career page 1 day ago

Apply at Mythic → Save job Scanned from mythic.ai

Not disclosed in this posting: compensation, years of experience, work arrangement, visa sponsorship.

Joblaze summary

In this role, the Compiler Engineer focuses on developing innovative compiler intermediate representations and strategies to enhance algorithmic workloads that feature dynamic control flows. Key skills include a strong understanding of compiler design and experience with hardware-software co-design, particularly in analog and digital systems. This position is ideal for someone with a solid background in compiler engineering and a passion for pushing the limits of AI computing. Mythic's cutting-edge technology and collaborative environment with hardware engineers provide a unique opportunity to influence the future of AI applications.

Joblaze insights

Quick facts

What's the tech stack?
Joblaze extracted these technologies from the posting: algorithmic workloads, analog technology, compiler, digital systems.
What seniority level is this role?
Mythic targets mid-level candidates for this position.
Is this full-time or contract?
Full-time for this Compiler Engineer - Algorithmic Workloads Compilation role at Mythic.

From the original posting

About us Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets. About the role Help push the boundaries of what can run on our accelerator. You’ll design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow—loops, branches, and iterative methods—going beyond static neural networks. Working side by side with hardware engineers, you’ll influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. The result: a compiler that makes complex algorithms practical to deploy while staying seamless for developers.

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