Principal Engineer - PCIe RTL Design
Posted by employer 4 months ago
First seen on Joblaze 5 days ago
Last verified on the company career page 1 day ago
Not disclosed in this posting: compensation, years of experience, work arrangement, visa sponsorship.
Joblaze summary
In this role, the Principal Engineer focuses on designing and developing PCIe RTL, ensuring high-performance and reliable solutions for semiconductor products. Proficiency in RTL design, verification methodologies, and familiarity with industry standards are essential for success. This position is ideal for experienced engineers with a strong background in digital design and a passion for innovation in semiconductor technology. Marvell Semiconductor is known for its collaborative environment, making it a fitting place for those who thrive in team-oriented settings.
Joblaze insights
- Listed 5 days ago on Joblaze — tracked directly from Marvell Semiconductor's career page.
- Marvell Semiconductor has 164 other open roles including Digital IC Design Engineer, Intern, Hardware Validation (Test Solutions) Engineer, AI Infrastructure Engineer Intern.
Quick facts
- What seniority level is this role?
- Marvell Semiconductor targets principal-level candidates for this position.
- Is this full-time or contract?
- Full-time for this Principal Engineer - PCIe RTL Design role at Marvell Semiconductor.