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Process Integration, Yield, Defect Reduction Engineering Lead

Location
Albuquerque, New Mexico, United States
Compensation
Not disclosed
Level
lead
Type
full time

Posted by employer 1 day ago

First seen on Joblaze 1 hour ago

Last verified on the company career page 1 hour ago

Apply at Intel → Save job Scanned from intel.com

Not disclosed in this posting: compensation, years of experience, work arrangement, visa sponsorship.

Joblaze summary

In this role, the individual will focus on enhancing manufacturing processes by integrating yield and defect reduction strategies. Key skills include expertise in semiconductor manufacturing, data analysis, and process optimization. This position is suited for a senior engineer with a strong background in process engineering and a proven track record in yield improvement initiatives. The team operates within Intel's advanced manufacturing environment, emphasizing collaboration and innovation.

Joblaze insights

  • Listed today — first seen on Joblaze November 10, 2026. Last confirmed on Intel's careers page November 10, 2026.

Quick facts

What seniority level is this role?
Intel targets lead candidates for this position.
Is this full-time or contract?
Full-time for this Process Integration, Yield, Defect Reduction Engineering Lead role at Intel.

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