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Senior DFT Logic Design Engineer

Location
US, Arizona, Phoenix
Compensation
Not disclosed
Level
senior
Type
full time · On-site

Posted by employer 1 month ago

First seen on Joblaze 1 month ago

Last verified on the company career page 18 hours ago

Apply at Intel → Save job Scanned from intel.com

Not disclosed in this posting: compensation, years of experience, visa sponsorship.

Joblaze summary

In this role, the Senior DFT Logic Design Engineer focuses on developing and implementing design-for-test strategies to enhance the testability of complex integrated circuits. Proficiency in digital design, test methodologies, and tools such as Verilog and DFT tools is essential for success. This position is well-suited for experienced engineers with a strong background in logic design and testing processes. The team operates within a leading technology company, emphasizing innovation and collaboration in semiconductor development.

Joblaze insights

  • Listed about a month ago — first seen on Joblaze September 17, 2026. Last confirmed on Intel's careers page November 8, 2026.

Quick facts

Is the Senior DFT Logic Design Engineer role remote?
No — this is an on-site role in US, Arizona, Phoenix.
Where is the role based?
Intel is hiring for this position in US, Arizona, Phoenix.
What seniority level is this role?
Intel targets senior candidates for this position.
Is this full-time or contract?
Full-time for this Senior DFT Logic Design Engineer role at Intel.

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