Is the Senior HPC Developer - RDMA Networking role remote?

No — this is an on-site role in Palo Alto, California, United States.

What's the salary range?

Clockwork Systems lists $150,000–$230,000 for this role.

How much experience is required?

At least 5 years of relevant experience for this Senior HPC Developer - RDMA Networking role.

Where is the role based?

Clockwork Systems is hiring for this position in Palo Alto, California, United States.

What's the tech stack?

Joblaze extracted these technologies from the posting: C++, DPUs, Linux, NUMA, NVMe-over-Fabrics, PCIe.

What seniority level is this role?

Clockwork Systems targets senior candidates for this position.

Is this full-time or contract?

Full-time for this Senior HPC Developer - RDMA Networking role at Clockwork Systems.

Senior HPC Developer - RDMA Networking at Clockwork Systems

Joblaze summary

In this role, the Senior HPC Developer focuses on designing and optimizing high-performance RDMA networking and storage systems, working closely with hardware and software components. Key skills include low-level C/C++ programming and a strong understanding of RDMA networking principles, particularly RoCE and NVMe-over-Fabrics. This position is suited for experienced systems engineers who thrive in fast-paced environments and enjoy tackling complex performance challenges. The team at Clockwork Systems emphasizes collaboration and innovation in building advanced AI infrastructure.

Joblaze insights

Listed yesterday — first seen on Joblaze October 7, 2026. Last confirmed on Clockwork Systems's careers page October 7, 2026.
Salary band is above the typical range for comparable tech roles (median ~$127,000).
Starts above 28% of 112 comparable senior other roles in United States that list C++ we track (median $165,000 across 24 companies). See C++ salary trends
C++ appears in 7.1% of 2441 comparable senior other roles in United States; PCIe appears in 0.3% of 2441 comparable senior other roles in United States.

Quick facts

Is the Senior HPC Developer - RDMA Networking role remote?: No — this is an on-site role in Palo Alto, California, United States.
What's the salary range?: Clockwork Systems lists $150,000–$230,000 for this role.
How much experience is required?: At least 5 years of relevant experience for this Senior HPC Developer - RDMA Networking role.
Where is the role based?: Clockwork Systems is hiring for this position in Palo Alto, California, United States.
What's the tech stack?: Joblaze extracted these technologies from the posting: C++, DPUs, Linux, NUMA, NVMe-over-Fabrics, PCIe.
What seniority level is this role?: Clockwork Systems targets senior candidates for this position.
Is this full-time or contract?: Full-time for this Senior HPC Developer - RDMA Networking role at Clockwork Systems.

From the original posting

About Clockwork Systems

To learn more, visit www.clockwork.io.

About the Role

We’re looking for a Senior Systems Engineer – RDMA Networking & Storage to help build and optimize high-performance infrastructure for AI and HPC systems.
You’ll work across RDMA networking and storage data paths, spanning compute hosts, NICs, DPUs, smart switches, storage systems, and the Linux software stack. The work includes RoCE networking, NVMe-over-Fabrics, congestion control, performance optimization, programmable network hardware, and debugging complex interactions across hardware and software.
This role is ideal for an experienced systems engineer who enjoys working close to the hardware, diagnosing difficult performance problems, and building reliable systems where latency, throughput, and network behavior matter.

What You’ll Do

Design, build, and optimize high-performance RDMA networking and storage systems
Work with RoCE, RDMA Verbs, and NVMe-over-Fabrics
Develop systems that leverage DPUs, SmartNICs, and programmable switches for packet processing, telemetry, control, and data-path acceleration
Develop and optimize software using queue pairs, completion queues, memory registration, zero-copy I/O, and other RDMA primitives
Debug performance and reliability issues across applications, Linux kernel, drivers, NICs, DPUs, switches, and storage systems
Analyze network and storage behavior including latency, throughput, queueing, congestion, packet loss, retransmissions, and flow control
Develop mechanisms to improve network performance and congestion behavior in high-bandwidth RDMA fabrics
Build tooling and instrumentation to understand end-to-end performance across compute, network, and storage
Profile and tune systems across PCIe, NUMA, CPU, memory, NIC, DPU, network, and storage boundaries
Own major components from design through implementation, performance validation, and deployment

What You Bring

5+ years of experience in systems, networking, storage, HPC, or other performance-critical software development
Strong proficiency in low-level C/C++
Strong understanding of RDMA networking, including RoCE and RDMA Verbs
Strong understanding of networking fundamentals, including packet processing, queues, congestion, and flow control
Experience debugging low-level Linux networking, storage, or driver behavior
Familiarity with concepts such as DMA, memory registration, queue pairs, completion queues, interrupts/polling, and zero-copy I/O
Experience profiling and optimizing latency- and throughput-sensitive systems
Ability to reason across hardware and software boundaries and independently debug complex system-level problems
Strong ownership and comfort working in a small, fast-moving engineering team

Bonus Points

Experience with DPUs, SmartNICs, or programmable network hardware
Experience with platforms such as NVIDIA BlueField or programmable switch environments
Experience with P4, switch SDKs, or in-network packet processing
Experience with NVMe, NVMe-oF, NVMe/RDMA, or NVMe/TCP
Experience with SPDK, DPDK, or other userspace I/O frameworks
Experience with Linux NVMe and RDMA subsystems
Experience with congestion control, including DCQCN, ECN, PFC, or related mechanisms
Experience tuning NVIDIA/Mellanox ConnectX NICs and RoCE fabrics
Experience working with high-performance switches and data-center network fabrics
Experience with PCIe, NUMA, huge pages, DMA, or CPU affinity optimization
Experience with performance profiling, tracing, or observability tooling
Background in AI infrastructure, HPC clusters, distributed storage, or large-scale data-center systems

Enjoy

Challenging, technically deep projects
A friendly and inclusive workplace culture
Competitive compensation
A great benefits package
Catered lunch

Compensation for this position will vary based on the skills and experience you bring, as well as internal equity considerations. For candidates hired at the posted level, the expected base salary range is $150,000–$230,000. The offered compensation package may also include stock options or other equity awards, subject to Clockwork’s equity program and applicable approvals.

Clockwork Systems is an equal opportunity employer. We are committed to building world-class teams by welcoming bright, passionate individuals from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, ancestry, religion, age, sex, sexual orientation, gender identity or expression, national origin, disability, or protected veteran status. We believe diversity drives innovation, and we grow stronger together.

Standard company text repeated across Clockwork Systems's postings is omitted here.

Senior HPC Developer - RDMA Networking

About Clockwork Systems

To learn more, visit www.clockwork.io.

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