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Senior Post-Silicon Validation Engineer

Join K2 Space as a Senior Post-Silicon Validation Engineer to lead silicon validation and integration for cutting-edge satellite technology.

Location
Los Angeles, CA, United States
Compensation
$170k–$250k/yr
Level
senior
Type
full time

Posted by employer 2 days ago

First seen on Joblaze 23 hours ago

Last verified on the company career page 23 hours ago

Apply at K2 Space → Save job Scanned from k2space.com

What you'll build

  • Own post-silicon validation strategy
  • Lead first silicon bring-up
  • Define and execute validation strategy
  • Help build the test and validation lab
  • Drive cross-functional debug

Must have

  • BS/MS in Electrical Engineering or Computer Engineering
  • 5+ years of post-silicon validation experience
  • Hands-on experience with mixed-signal SoCs
  • Strong hardware/software debug skills
  • Experience with lab test and measurement equipment

Nice to have

  • RF SoC and RF/analog characterization experience
  • FPGA prototyping experience
  • Experience validating DSP functionality

Requirements

Experience
5+ years
Education
Bachelor's degree

Not disclosed in this posting: work arrangement, visa sponsorship.

Benefits

Equity/Stock Options Paid Time Off Health Insurance Parental Leave

Joblaze summary

The Senior Post-Silicon Validation Engineer at K2 Space is responsible for leading the validation strategy and execution for complex mixed-signal SoCs, ensuring a seamless transition from silicon validation to product integration. This role requires expertise in silicon characterization, hands-on experience with lab equipment, and strong debugging skills across hardware and software. Ideal candidates will have over five years of relevant experience and a background in electrical or computer engineering, with a focus on SoC architecture and RF/mixed-signal circuits.

Joblaze insights

  • Listed today — first seen on Joblaze September 17, 2026. Last confirmed on K2 Space's careers page September 17, 2026.
  • This exact title is also open at 1 other location at K2 Space: Seattle, WA, United States.
  • Salary band is above the typical range for comparable tech roles (median ~$126,887).
  • Starts above 72% of 229 comparable senior other roles in United States that list Python we track (median $150,000 across 53 companies). See Python salary trends
  • Python appears in 16.9% of 2093 comparable senior other roles in United States; SoC appears in 0.4% of 2093 comparable senior other roles in United States.

Quick facts

What's the salary range?
K2 Space lists $170,000–$250,000 for this role.
How much experience is required?
At least 5 years of relevant experience for this Senior Post-Silicon Validation Engineer role.
What's the tech stack?
Joblaze extracted these technologies from the posting: Computer Engineering, Electrical Engineering, Mixed-Signal, Python, RF, SoC.
What seniority level is this role?
K2 Space targets senior candidates for this position.
Is this full-time or contract?
Full-time for this Senior Post-Silicon Validation Engineer role at K2 Space.

From the original posting

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

About the Role
We are looking for a hands-on Senior Post-Silicon Validation Engineer to own silicon bring-up, characterization, and system-level validation of complex mixed-signal SoCs, while enabling a smooth transition from validated silicon into product integration.
You will define the validation strategy, build our test and validation capability from the ground up, and lead execution from first silicon through product readiness.

Responsibilities

  • Own post-silicon validation strategy, test planning, execution, coverage, and sign-off.
  • Lead first silicon bring-up across power, clocks, debug interfaces, processor/memory subsystems, peripherals, and high-speed interfaces.
  • Define and execute the validation strategy and readiness criteria needed to enable product integration, ensuring silicon, firmware, test infrastructure, and system interfaces are ready for integration.
  • Own system-level test planning and execution, including functional, performance, stress, and corner-case testing.
  • Help build the test and validation lab from the ground up, including equipment, infrastructure, test setups, and automated characterization and regression environments.
  • Partner with RF/analog and mixed-signal designers on characterization of RF chains, PLLs, ADCs/DACs, clocking, and power.
  • Work closely with systems/DSP teams to validate DSP and calibration algorithms on silicon and correlate measured performance with models and simulations.
  • Partner with FPGA, firmware, RTL/DV, hardware, and systems teams to accelerate silicon bring-up, enable product integration, and drive end-to-end validation.
  • Drive cross-functional debug across silicon, firmware, RTL, package, board, and system boundaries.
  • Build reusable automation for instrumentation control, data collection, analysis, regression, and reporting.
  • Drive silicon issues from discovery through root cause, workaround, and resolution.

Qualifications

  • BS/MS in Electrical Engineering, Computer Engineering, or equivalent experience.
  • 5+ years of post-silicon validation, SoC bring-up, silicon characterization, or related experience.
  • Hands-on experience bringing up complex mixed-signal SoCs/ASICs and transitioning silicon into product/system integration.
  • Hands-on experience with lab test and measurement equipment, including oscilloscopes, spectrum/signal analyzers, vector signal generators, network analyzers, logic analyzers, power supplies, and related RF/mixed-signal instrumentation.
  • Strong understanding of SoC architecture and working knowledge of RF/analog and mixed-signal circuits.
  • Strong hardware/software debug skills spanning silicon, RTL, firmware, board, and systems.
  • Experience building silicon validation labs, test infrastructure, and automated measurement environments.
  • Experience validating DSP, calibration, or signal-processing functionality in silicon.
  • Strong Python/scripting skills for lab automation, instrumentation, and data analysis.
  • Experience with embedded C/C++, JTAG, SPI, UART, and register-level debug.
  • Ability to lead cross-functional bring-up while remaining deeply hands-on in the lab.

Preferred Qualifications

  • RF SoC and RF/analog characterization experience.
  • ADC/DAC, PLL, RF transceiver, or high-speed SerDes/JESD validation experience.
  • FPGA prototyping and RISC-V/ARM SoC experience.

Compensation and Benefits:

  • Base salary range for this role is $170,000 – $250,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!

Standard company text repeated across K2 Space's postings is omitted here.

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