Senior Principal Engineer – Hardware Chip Lead, Connectivity BU
Posted by employer 2 months ago
First seen on Joblaze 1 day ago
Last verified on the company career page 1 day ago
Not disclosed in this posting: compensation, years of experience, visa sponsorship.
Joblaze summary
In this role, the Senior Principal Engineer will lead the design and development of hardware chips focused on connectivity solutions, overseeing the entire engineering process from concept to production. Key skills include expertise in hardware design, chip architecture, and proficiency with relevant design tools and methodologies. This position is ideal for seasoned engineers with a strong background in semiconductor technology and leadership experience. Marvell Semiconductor is known for its innovative approach in the connectivity space, making this a pivotal role within the team.
Joblaze insights
- Listed yesterday — first seen on Joblaze September 27, 2026. Last confirmed on Marvell Semiconductor's careers page September 27, 2026.
Quick facts
- Is the Senior Principal Engineer – Hardware Chip Lead, Connectivity BU role remote?
- No — this is an on-site role in Santa Clara, CA, United States.
- Where is the role based?
- Marvell Semiconductor is hiring for this position in Santa Clara, CA, United States.
- What seniority level is this role?
- Marvell Semiconductor targets principal-level candidates for this position.
- Is this full-time or contract?
- Full-time for this Senior Principal Engineer – Hardware Chip Lead, Connectivity BU role at Marvell Semiconductor.