Posted by employer 5 days ago
First seen on Joblaze 3 days ago
Last verified on the company career page 1 day ago
Not disclosed in this posting: compensation, seniority, years of experience, work arrangement, visa sponsorship.
Joblaze summary
In this role, the engineer focuses on validating power management systems within system-on-chip (SoC) designs, ensuring they meet performance and efficiency standards. Proficiency in hardware validation, scripting languages, and familiarity with power management protocols are essential for success. This position is suited for experienced engineers with a background in semiconductor design and validation. The team operates within Intel's broader efforts to enhance power efficiency in its products.
Joblaze insights
- Listed 3 days ago — first seen on Joblaze November 8, 2026. Last confirmed on Intel's careers page November 10, 2026.