Sr. Staff CAD- ASIC Design Verification Agentic Workflow
Posted by employer 4 days ago
First seen on Joblaze 21 hours ago
Last verified on the company career page 21 hours ago
Not disclosed in this posting: compensation, years of experience, work arrangement, visa sponsorship.
Joblaze summary
In this role, the individual is responsible for leading the design verification process for ASICs, ensuring that the products meet specified requirements through rigorous testing and validation. Proficiency in CAD tools and a strong understanding of ASIC design principles are essential, along with experience in verification methodologies. This position is suited for senior professionals with a background in semiconductor design and verification. The team at Marvell Semiconductor emphasizes collaboration and innovation in a fast-paced environment.
Joblaze insights
- Listed today — first seen on Joblaze October 1, 2026. Last confirmed on Marvell Semiconductor's careers page October 1, 2026.
Quick facts
- What seniority level is this role?
- Marvell Semiconductor targets staff-level candidates for this position.
- Is this full-time or contract?
- Full-time for this Sr. Staff CAD- ASIC Design Verification Agentic Workflow role at Marvell Semiconductor.