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Power Delivery Jobs in San Jose

2 open positions · Updated 4 days ago

2 roles Mid 1, Senior 1 10 yrs experience San Jose Full-time newest 4 days ago

Also hiring: Allegro Package Designer ASIC CoWoS high-speed signaling IC Layout Design PDN

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Substrate IC Package Layout Design Engineer

Design complex IC substrate packages for high-performance processors in a fully in-person team focused on frontier AI systems.

Etched San Jose Published 4 weeks ago

high-speed signaling Signal integrity Power Delivery CoWoS IC Layout Design

Power Validation Engineer

Join Etched as a Power Validation Engineer to lead power characterization for ASICs and enhance system design decisions.

Etched San Jose Published 4 months ago

PDN VRM Power Delivery ASIC Python

Flexible on stack

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