ASIC

Join SpaceX as a Sr. SOC Physical Verification Engineer to develop cutting-edge silicon for Starlink's global connectivity.

Lead the design and development of complex SoCs for next-generation AI acceleration platforms at Graphcore.

Join SpaceX as a Sr. IC Package Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

Join SpaceX as a Sr. IC Package Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

Join Jariet Technologies as a Principal ASIC Design Engineer to lead high-speed mixed signal/DSP projects.

Join Anthropic as a Research Engineer to advance AI models' silicon design capabilities within a collaborative team.

Join Graphcore as a Graduate Silicon Engineer and gain hands-on experience in silicon design over a two-year program.

Join SpaceX as a Sr. ASIC Design Engineer to develop cutting-edge ASICs for the Starlink network.

Lead a team in post-silicon validation of cutting-edge AI chips and platforms at Graphcore's new AI Engineering Campus in Austin.

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for space and ground infrastructures.

Join SpaceX as a Sr. ASIC Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for the Starlink network.

Lead the technical direction of IonQ's post-quantum cryptography hardware acceleration program in Geneva.

Join Etched as an RTL Engineer to ensure AI chips operate efficiently in a fast-paced, innovative environment.

Own the accelerator software for cutting-edge chips at a frontier AI startup in San Jose.

Join Etched as a Design Verification intern to validate custom IPs for cutting-edge AI hardware in a collaborative environment.

Join Etched as a Senior Signal & Power Integrity Engineer to optimize electrical performance for cutting-edge AI accelerator platforms.

Join Etched as a Physical Design intern to work on front-end designs in silicon and improve iteration speed to final signoff.

Join Etched as a Power Integrity Engineer to ensure robust power delivery for high-performance ASICs in a cutting-edge hardware environment.

Join Etched as a Power Validation Engineer to lead power characterization for ASICs and enhance system design decisions.

Own end-to-end program delivery as a Technical Program Manager in a cutting-edge AI hardware startup.

Join Etched as a Silicon Validation Engineer to develop firmware for AI/ML accelerator ASICs in a hands-on, onsite role.

Ensure robust quality systems for advanced AI hardware builds as a Product Quality Engineer at Etched in San Jose.

Join Etched as an ASIC Technical Program Manager to drive technical execution in a hands-on role within a startup environment.

Lead advanced ASIC package architecture and execution for high-performance mixed-signal and digital SoCs at K2 Space.

Join K2 Space as a Senior ASIC Package Design Engineer to implement advanced ASIC package architecture for high-performance satellites.

Lead ASIC package design for high-performance satellites in a fast-paced, remote environment.

Join K2 Space as a Senior ASIC Package Design Engineer to implement advanced ASIC package architecture for high-performance satellites.

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

Lead the implementation of complex SoCs for next-generation satellite and space systems at a high-growth company.

Lead the implementation of complex SoCs for next-generation satellite and space systems at a high-growth company.

Join K2 Space as a Senior ASIC Physical Design Engineer to develop advanced SoCs for next-generation satellite systems.

Join K2 Space as a Senior ASIC Physical Design Engineer to develop advanced SoCs for next-generation satellites.

Lead end-to-end Design for Testability implementation for complex ASIC/SoC designs at a fast-paced AI startup.

Join Alif Semiconductor as a Sr. Digital Implementation Engineer to create turn-key solutions for Cellular IoT devices.

Join Ambiq as a HW System/SoC Architect to lead architectural design for low-power semiconductor solutions in Singapore.

Lead the strategy and operations of AI compute infrastructure in orbit at Cowboy Space Corporation.

Join Yubico as a Senior Hardware Engineer to innovate and design cutting-edge security devices from prototypes to mass production.

Join SpaceX as a Principal RFIC Engineer to develop cutting-edge RFICs for national security applications in a fast-paced environment.

Join SpaceX as a Sr. DSP Systems Engineer to develop cutting-edge ASICs for satellite broadband systems.

Join SpaceX as a Sr. DSP Systems Engineer to develop cutting-edge ASICs for satellite broadband systems.

Join SpaceX as a Principal Engineer to develop cutting-edge RFICs for the Starmind satellite constellation.

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network.

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

Own the end-to-end execution of custom silicon for AI systems at Anthropic, driving external partnerships and program management.

Join Anthropic as a Hardware Systems Architect to lead the design and architecture of cutting-edge AI hardware systems.

Join SpaceX as an Electrical Design Engineer to develop high-reliability electronics for the Starlink satellite communication network.

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.