← Back to results

Post-Silicon Validation Engineer

Join Etched as a Post-Silicon Validation Engineer to validate and characterize ASICs for cutting-edge AI/ML hardware.

Location
San Jose, United States
Compensation
Not disclosed
Level
senior
Type
full time · On-site

Posted by employer 11 months ago

First seen on Joblaze 19 hours ago

Last verified on the company career page 19 hours ago

Apply at Etched → Save job Scanned from etched.com

What you'll build

  • Drive early bring-up of first silicon
  • Perform deep-dive debug of silicon issues
  • Collaborate with design and verification teams
  • Validate and characterize custom IP blocks
  • Develop post-silicon validation infrastructure

Must have

  • 7+ years of experience in post-silicon validation
  • Proven expertise in early silicon bring-up
  • Deep knowledge of peripheral interfaces
  • Proficiency in C and Python
  • Hands-on expertise with validation lab tools

Nice to have

  • Experience with low-speed peripheral interfaces
  • Experience with high-speed protocols
  • Experience with memory subsystems
  • Experience with AI/ML model profiling
  • Experience with system-level validation

Requirements

Experience
7+ years
Education
Bachelor's degree

Not disclosed in this posting: compensation, visa sponsorship.

Benefits

Wellness Benefits Daily Lunch & Dinner Housing Subsidy Health Insurance Relocation Assistance

Joblaze summary

The Post-Silicon Validation Engineer at Etched is tasked with the critical role of validating and characterizing ASICs, ensuring their functional correctness and performance from initial silicon through production. This position requires expertise in silicon bring-up, debugging, and validation, along with proficiency in programming and lab instrumentation. Ideal candidates have over seven years of experience in post-silicon validation, particularly with AI/ML accelerators, and possess strong analytical and collaborative skills. Etched emphasizes a hands-on approach, fostering a culture where engineering and research intersect.

Joblaze insights

  • Listed today — first seen on Joblaze September 21, 2026. Last confirmed on Etched's careers page September 21, 2026.
  • Python appears in 53.2% of 543 comparable senior ai/ml roles in United States; Ethernet appears in 0.2% of 543 comparable senior ai/ml roles in United States.

Quick facts

Is the Post-Silicon Validation Engineer role remote?
No — this is an on-site role in San Jose, United States.
How much experience is required?
At least 7 years of relevant experience for this Post-Silicon Validation Engineer role.
Where is the role based?
Etched is hiring for this position in San Jose, United States.
What's the tech stack?
Joblaze extracted these technologies from the posting: AI/ML, C++, DDR, Ethernet, HBM, I2C.
What seniority level is this role?
Etched targets senior candidates for this position.
Is this full-time or contract?
Full-time for this Post-Silicon Validation Engineer role at Etched.

From the original posting

Job Summary

We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and characterizing ASICs from first silicon through the production ramp. This role is crucial in ensuring functional correctness, performance, and reliability of our AI/ML accelerator hardware, enabling successful deployment of our cutting-edge products.

Key Responsibilities

  • Drive early bring-up of first silicon, including boot, initialization, and debug of ASICs.

  • Perform deep-dive debug of silicon issues across RTL, firmware, and system levels.

  • Collaborate closely with design, verification, and board teams to root-cause and resolve functional and electrical issues.

  • Validate and characterize custom IP blocks and accelerator components.

  • Execute functional and performance validation of compute units and specialized processing elements.

  • Conduct IP-level and full-chip stress testing and corner case analysis to ensure robust operation.

  • Develop and extend post-silicon validation infrastructure, automation, and test suites.

  • Implement efficient result capture, analysis, and regression frameworks.

  • Utilize lab instrumentation (oscilloscopes, analyzers, BERTs, pattern generators) for detailed signal and system characterization.

  • Define validation strategies and coverage metrics across design blocks and subsystems.

  • Partner with RTL, DFT, ATE, firmware, and system architecture teams to ensure smooth transition from pre-silicon verification to post-silicon validation.

  • Provide critical feedback on test escapes, yield issues, and silicon errata, influencing silicon revisions and firmware/driver workarounds.

You may be a good fit if you have

  • 7+ years of experience in post-silicon validation, bring-up, and debug of ASICs (preferably including AI/ML accelerators)

  • Proven expertise in early silicon bring-up, debug, and validation

  • Deep knowledge of peripheral interfaces and board-level debug

  • Proficiency in C, Python, and scripting for validation automation

  • Hands-on expertise with oscilloscopes, logic/protocol analyzers, and other validation lab tools

  • Familiarity with firmware, bootloaders, and low-level silicon debug environments

  • Strong problem-solving, analytical, and collaboration skills across hardware and software teams

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's preferred)

Strong candidates may also have experience with

  • Low-speed peripheral interfaces (I2C, SPI, UART, JTAG)

  • High-speed protocols (PCIe, Ethernet)

  • Memory subsystems (HBM, DDR)

  • Performance and thermal characterization

  • AI/ML model profiling and workload correlation

  • System-level validation of accelerators or server platforms

Benefits

  • Medical, dental, and vision packages with generous premium coverage

    • $500 per month credit for waiving medical benefits

  • Housing subsidy of $2.5k per month for those living within walking distance of the office

  • Daily lunch + dinner in our office

  • Unlimited compute budget subject to ROI justification

 

Standard company text repeated across Etched's postings is omitted here.

Similar positions

Etched
Product Engineer, Silicon Validation
Etched · San Jose, United States
Etched
Applied AI Engineer, Silicon Engineering
Etched · San Jose, United States
Etched
Infrastructure Software Engineer
Etched · San Jose, United States
Etched
Accelerator Software Engineer
Etched · San Jose, United States
Etched
ASIC Technical Program Manager
Etched · San Jose, United States