Is the Director - Post-Silicon Validation (Functional) role remote?

No — this is an on-site role in Austin, Texas, United States.

How much experience is required?

At least 10 years of relevant experience for this Director - Post-Silicon Validation (Functional) role.

Where is the role based?

Graphcore is hiring for this position in Austin, Texas, United States.

What's the tech stack?

Joblaze extracted these technologies from the posting: AI, ASIC, C++, Emulator, FPGA, Linux.

What seniority level is this role?

Graphcore targets director candidates for this position.

Is this full-time or contract?

Full-time for this Director - Post-Silicon Validation (Functional) role at Graphcore.

Director - Post-Silicon Validation (Functional) at Graphcore

Joblaze summary

In this role, the Director of Post-Silicon Validation will oversee the validation of high-performance AI chips, ensuring they meet functional requirements through rigorous testing and debugging. The position demands expertise in bare metal C/C++, Python, and a solid understanding of post-silicon validation processes, making it suitable for candidates with over a decade of experience in semiconductor engineering. This role is ideal for those who thrive in collaborative environments and can lead cross-functional teams to drive continuous improvements in validation methodologies.

Joblaze insights

Listed today — first seen on Joblaze October 9, 2026. Last confirmed on Graphcore's careers page October 9, 2026.
This exact title is also open at 1 other location at Graphcore: Austin, Texas, United States.

Quick facts

Is the Director - Post-Silicon Validation (Functional) role remote?: No — this is an on-site role in Austin, Texas, United States.
How much experience is required?: At least 10 years of relevant experience for this Director - Post-Silicon Validation (Functional) role.
Where is the role based?: Graphcore is hiring for this position in Austin, Texas, United States.
What's the tech stack?: Joblaze extracted these technologies from the posting: AI, ASIC, C++, Emulator, FPGA, Linux.
What seniority level is this role?: Graphcore targets director candidates for this position.
Is this full-time or contract?: Full-time for this Director - Post-Silicon Validation (Functional) role at Graphcore.

From the original posting

Graphcore

Director-Post Silicon Validation (Functional)

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin, Texas which will play a central role in Graphcore's work building the future of AI computing.

We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems.

Job Summary

We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms.

You will play a key role in supporting new product introductions and validation. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams.

Working within the Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes.

The Team

The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team.

Responsibilities and Duties:

• Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon

• Deploy silicon validation tests on first silicon and debugging them

• Develop automated test framework and regression test suites in Python to optimize validation efficiency

• Collaborate closely with engineers from many other disciplines on a variety of topics

• Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies

• Analyse test results, identify and debug failures/defects

• Contribute to shared test and validation infrastructure

• Provide feedback to architects

Minimum Qualifications:

• Understanding of ML applications and their workloads

• A self-starter who can apply independent judgement

• A team player able to lead and support colleagues with difficult concepts

• Strong experience in Bare metal / embedded C/C++

• Excellent problem-solving, analytical & diagnostic skills

• Ability to work across teams and programming languages to find root causes of critical and complex issues

• Experience of the post-silicon validation process applied in digital ASIC environments

• Python, Linux

• Excellent communication skills and the ability to explain difficult concepts to resolve issues

Preferred Qualifications:

• 10+ years experience

• Experience building and leading, multi-site teams

• Driver level experience with one or more of the following is highly desirable:

PCIe
Ethernet
Memory technologies (LPDDR, DDR, HBM, …)
Other peripherals such as I2C, I3C, SPI, …

• Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable.

• Experience of Arm CPUs, System IP and debug tools.

• Experience of AMBA protocols.

• Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, in addition to functional validation

Why Join Us

This is an opportunity to play a central role in developing an advanced AI compute platform that pushes the boundaries of performance and efficiency. You will be part of a highly skilled and motivated team, working on technology that will have a significant impact across future AI systems.

USA Benefits

In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

Director - Post-Silicon Validation (Functional)

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