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Senior Static Timing Analysis (STA) Engineer

Location
US, Arizona, Phoenix
Compensation
Not disclosed
Level
senior
Type
full time

Posted by employer 1 week ago

First seen on Joblaze 1 week ago

Last verified on the company career page 1 day ago

Apply at Intel → Save job Scanned from intel.com

Not disclosed in this posting: compensation, years of experience, work arrangement, visa sponsorship.

Joblaze summary

In this role, the Senior Static Timing Analysis Engineer at Intel focuses on ensuring the timing integrity of complex digital designs through rigorous analysis and optimization. Proficiency in STA tools and methodologies, along with a solid understanding of digital circuit design, are essential for success. This position is ideal for experienced engineers with a background in semiconductor design and a passion for tackling challenging timing issues. Intel's commitment to innovation and cutting-edge technology makes this a dynamic environment for professionals looking to make a significant impact.

Joblaze insights

Quick facts

What seniority level is this role?
Intel targets senior candidates for this position.
Is this full-time or contract?
Full-time for this Senior Static Timing Analysis (STA) Engineer role at Intel.

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