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SOC Physical Design Static Timing Analysis Engineer

Location
US, Arizona, Phoenix
Compensation
Not disclosed
Level
Not specified
Type
Not specified

Posted by employer 4 months ago

First seen on Joblaze 1 week ago

Last verified on the company career page 5 days ago

Apply at Intel → Save job Scanned from intel.com

Not disclosed in this posting: compensation, seniority, years of experience, work arrangement, visa sponsorship.

Joblaze summary

In this role, the engineer focuses on performing static timing analysis to ensure the reliability and performance of physical designs. Proficiency in tools and methodologies related to timing analysis, along with a solid understanding of digital design principles, is essential. This position is ideal for experienced professionals with a background in semiconductor design and a strong analytical mindset. Intel's emphasis on innovation and cutting-edge technology makes this a dynamic environment for those looking to advance their careers.

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