Drive the physical implementation of key analog subsystems as a Staff Engineer at Ambiq in Singapore.
Posted by employer 18 hours ago
First seen on Joblaze 1 hour ago
Last verified on the company career page 1 hour ago
What you'll build
- Partner with analog designers on chip-level and block-level floorplanning and layout strategy
- Drive layout architecture decisions to balance performance, matching, area, and reliability trade-offs
- Execute transistor-level analog IC layout
- Lead layout for complex blocks and supervise layout work from other engineers
- Support prototype chip bring-up and testing
Must have
- Layout-related experience across the full flow
- Experience with floorplanning and whiteboarding with designers
- Experience with detailed layout and parasitic extraction
- Experience with LVS/DRC closure and tape-out
- Experience with validation and production test support
Practical constraints
- Onsite presence required 5 days a week
Not disclosed in this posting: compensation, years of experience, visa sponsorship.
Joblaze summary
In the role of Staff Engineer, Analog Layout at Ambiq, the individual will focus on the physical implementation of analog subsystems, ensuring that designs meet performance and reliability standards. Key skills include expertise in transistor-level layout and experience with advanced technologies like 22nm and 12nm processes. This position is ideal for a seasoned engineer with a comprehensive background in layout design cycles and a collaborative mindset. The team emphasizes innovation and problem-solving, contributing to the company's mission of enhancing energy efficiency in semiconductor solutions.
Joblaze insights
- Listed today — first seen on Joblaze September 19, 2026. Last confirmed on Ambiq's careers page September 19, 2026.
Quick facts
- Is the Staff Engineer, Analog Layout role remote?
- No — this is an on-site role in Singapore, Singapore.
- Where is the role based?
- Ambiq is hiring for this position in Singapore, Singapore.
- What seniority level is this role?
- Ambiq targets staff-level candidates for this position.
- Is this full-time or contract?
- Full-time for this Staff Engineer, Analog Layout role at Ambiq.
From the original posting
Company Overview
Scope
As the Staff Engineer, Analog Layout at Ambiq, you will drive the physical implementation of key analog subsystems, including PMUs, clocking, and data converters, translating circuit architecture into silicon-ready layout that meets performance, area, matching, and reliability targets.
This role works closely with Analog Design and RTL/Physical Design teams to implement custom analog layouts that meet and exceed customer needs. Designs will be in leading-edge technologies, such as 22nm, 12nm, and beyond.
The successful candidate will be a highly motivated team player who, through collaboration with designers and layout peers, will help everyone succeed.
The person in this role will be well-rounded, having been through a number of design cycles. They will have layout-related experience across the full flow, from floorplanning and whiteboarding with designers, to detailed layout and parasitic extraction, to LVS/DRC closure and tape-out, through validation and production test support.
This role will be onsite, and the candidate will be expected to have a presence on site 5 days a week.
Responsibilities
- Partner with analog designers on chip-level and block-level floorplanning and layout strategy
- Drive layout architecture decisions to balance performance, matching, area, and reliability trade-offs
- Execute transistor-level analog IC layout, including critical matching, shielding, and parasitic-sensitive structures
- Lead layout for complex blocks and closely supervise or review layout work from other layout engineers
- Conduct layout design reviews and resolve action items generated as a result of these reviews
- Attend circuit design reviews to provide layout feasibility input and guidance to designers and other layout engineers
- Work with analog and digital designers to ensure layout meets circuit intent and interface requirements
- Own parasitic extraction, LVS, DRC, antenna, and fill closure for assigned blocks and top-level integration
- Support prototype chip bring-up and testing to help validate analog circuit blocks against layout-dependent effects
- Support development of manufacturing test plans where layout impacts testability (e.g., probe access, trim structures)
- Support Product Engineering to meet manufacturing/production needs related to layout and yield
- Support Applications Engineering on layout-related customer questions (e.g., matching, noise, reliability)
Standard company text repeated across Ambiq's postings is omitted here.