Join Ambiq as a Staff Engineer to verify digital and mixed-signal designs for low-power semiconductor solutions.
Posted by employer 2 months ago
First seen on Joblaze 1 week ago
Last verified on the company career page 1 day ago
Skills & Technologies
Role intensity
50% coding
Requirements
- Experience
- 7–10 years
- Education
- Master's degree
Not disclosed in this posting: compensation, work arrangement, visa sponsorship.
Joblaze summary
In this role, the Staff Engineer for Design Verification at Ambiq focuses on verifying digital and mixed-signal designs for systems-on-chip, ensuring high-quality results through comprehensive test plans and execution. Key skills include expertise in ARM or RISC-V microcontrollers, SystemVerilog, and low-power design methodologies. This position is ideal for seasoned professionals with 7 to 10 years of experience in SoC verification, particularly those familiar with energy-efficient designs. Ambiq's collaborative environment emphasizes innovation and problem-solving, making it a fitting place for those eager to contribute to cutting-edge technology.
Joblaze insights
- Listed 9 days ago on Joblaze — tracked directly from Ambiq's career page.
- Ambiq has 45 other open roles including Sr. Director, SoC Architecture, Software Architect, Staff Engineer, Product Test .
- 6527 active Python roles on Joblaze right now.
- 1661 active C++ roles on Joblaze right now.
- 86 active Perl roles on Joblaze right now.
- Typical Python salary we track runs $125,000–$190,800 (median $160,000, across 3229 roles). See Python salary trends
Quick facts
- How much experience is required?
- 7–10 years of relevant experience for this Staff Engineer - Design Verification role.
- What's the tech stack?
- Joblaze extracted these technologies from the posting: ARM, C++, Makefile, Perl, Python, RISC-V.
- What seniority level is this role?
- Ambiq targets staff-level candidates for this position.
- Is this full-time or contract?
- Full-time for this Staff Engineer - Design Verification role at Ambiq.
From the original posting
Company Overview
Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.
Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.
Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.
We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.
At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.
If that's you, join us — the intelligence everywhere revolution starts here.
Scope
You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.
Responsibilities
- The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.
- Develop test plans at block, sub-system, and chip level.
- Execute SoC-based verification at full-chip and module level verification.
- Experience in ARM or RISC-V based micro-controllers.
- Power-aware methodology (CPF/UPF).
- Write C-based lib packages and tests.
- Architect and implement scalable and reusable module test benches using SystemVerilog and UVM.
- Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.
- Automate the test environment for randomized testing and score-boarding.
- Utilize advanced debugging techniques to identify and resolve design and verification issues.
- Perform root-cause analysis and work with design teams to fix identified issues.
- Define and track functional and code coverage metrics to ensure thorough verification.
- Ensure that verification quality meets or exceeds industry standards and project requirements.
- Edge-based AI inference is preferred.
Qualifications
- BSEE/MSEE with 7 - 10+ years of experience (seniority depends on years of experience) in block, sub-system, and full-chip verification.
- Technologies: Experienced in ARM M/RISC-V (Preferred) SoC Verification, expert in AMBA AXI/AHB/APB, DMA, Flow Control, Serial Devices, Low Power (CPF/UPF) Verification, 3rd party IP integration verification.
- Experience in peripheral modules (UART, SPI, I2C), Audio subsystem, Display subsystem, USB, OTP, Crypto is a plus.
- Languages: Strong in SystemVerilog (UVM), Verilog, C/C++, Python, Perl, or Makefile.
- Should have delivered multiple chips functioning to specification.
- Identify and manage verification deliverables, milestones, and schedules.
- Proactively identify potential verification risks and develop mitigation strategies.
- Collaborate with design, architecture, and software teams to understand and verify design intent.
- Communicate verification progress, issues, and results to stakeholders and management.
- Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges.
- Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.
- C-based verification in an SoC environment is required.
- Experience with ARM processor-based designs and low-power design techniques is a plus.