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Digital Asic Design Jobs in Palo Alto

1 open positions · Updated 1 month ago

1 role Lead 1 8 yrs experience Palo Alto, CA Full-time newest 1 month ago

Also hiring: Analog ASIC Design ASIC FPGA PCB Project Management RF ASIC Design

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Sr. Technical Project Lead (Silicon Engineering) Visa

Lead complex silicon projects at SpaceX, developing next-generation ASICs for Starlink's global connectivity solutions.

SpaceX Palo Alto, CA $175k–$280k/yr Published 1 month ago

Project Management Digital ASIC Design Silicon Engineering PCB FPGA

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