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Hdl Simulators Jobs

1 open positions · Updated 3 months ago

1 role Mid 1 1 yrs experience Redmond, WA Full-time newest 3 months ago

Also hiring: Altera Quartus II bash C++ digital communication DSP EDA tools

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FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$175k/yr Published 3 months ago

C++ Xilinx Vivado Verilog DSP HDL simulators

Flexible on stack

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