"hdl simulators" Jobs

17 open tech roles matching “hdl simulators”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, C++, Verilog. Every listing is re-checked daily and closed roles are removed.

Showing 17 of 17 results

Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $175k–$280k/yr Published 3 days ago

Verilog ASIC Python System Verilog SoC

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

SpaceX Irvine, CA $165k–$265k/yr Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$270k/yr Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Engineer to develop next-generation ASICs for space and ground infrastructures.

SpaceX Austin, TX Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 1 week ago

C++ Xilinx Vivado Verilog DSP HDL simulators

Flexible on stack

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ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an ASIC Design Engineer to develop cutting-edge FPGAs and ASICs for the Starlink broadband internet system.

SpaceX Palo Alto, CA $135k–$175k/yr Published 3 days ago

C++ Xilinx Vivado Verilog DSP HDL simulators

Flexible on stack

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FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 1 week ago

C++ Xilinx Vivado Verilog DSP HDL simulators

Flexible on stack

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Senior FPGA Engineer (TS/SCI)

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Los Angeles, CA $120k–$225k/yr Published 2 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Senior FPGA Engineer

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Los Angeles, CA $120k–$225k/yr Published 6 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Senior FPGA Engineer

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Seattle, WA $120k–$225k/yr Published 3 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Senior Flight Software Engineer

Join K2 Space as a Senior Flight Software Engineer to develop software for cutting-edge spacecraft in a fast-paced environment.

K2 Space Los Angeles, CA $160k–$200k/yr Published 6 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 6 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Senior Flight Software Engineer

Join K2 Space as a Senior Flight Software Engineer to develop software for cutting-edge spacecraft in a fast-paced environment.

K2 Space Seattle, WA $160k–$200k/yr Published 3 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Principal Flight Software Engineer

Join K2 Space as a Principal Flight Software Engineer to develop software for cutting-edge spacecraft in a fast-paced environment.

K2 Space Seattle, WA $200k–$240k/yr Published 3 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Principal Flight Software Engineer

Join K2 Space as a Principal Flight Software Engineer to develop software for high-power spacecraft in a fast-paced environment.

K2 Space Los Angeles, CA $200k–$240k/yr Published 10 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Principal ASIC Design Engineer (Starshield) Visa

SpaceX Hawthorne, CA $200k–$285k/yr Published 6 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Manager, ASIC Design Engineering (Starshield Silicon) Visa

SpaceX Hawthorne, CA $190k–$245k/yr Published 5 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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