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9 open positions · Updated 2 weeks ago

Average salary (USD/year): 135.8k–195k/yr

9 roles Mid 6, Senior 2, Staff 1 1–5 yrs experience Austin, TX +4 more Full-time newest 2 weeks ago

Also hiring: Python bash ASIC CMOS FinFET TCL

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ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an ASIC Design Engineer to develop cutting-edge FPGAs and ASICs for the Starlink broadband internet system.

SpaceX Palo Alto, CA $135k–$175k/yr Published 2 weeks ago

C++ Xilinx Vivado Verilog C DSP

Flexible on stack

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FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 4 weeks ago

C++ Xilinx Vivado Verilog C DSP

Flexible on stack

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FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 4 weeks ago

C++ Xilinx Vivado Verilog C DSP

Flexible on stack

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Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 1 month ago

FinFET Makefile ASIC Python Perl

Flexible on stack

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Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Austin, TX Published 1 month ago

FinFET bash ASIC Python Perl

Flexible on stack

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Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Physical Design Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Palo Alto, CA $135k–$175k/yr Published 1 month ago

FinFET bash ASIC Python Perl

Flexible on stack

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Staff Silicon Physical Design Engineer - Bengaluru

Join Graphcore as a Staff Silicon Physical Design Engineer in Bengaluru, contributing to the development of next-gen AI superchips.

Graphcore Bengaluru, India Published 1 month ago

Floorplanning Physical Verification 7nm Timing Analysis Python

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Austin, TX Published 5 months ago

FinFET Scripting ASIC EDA tools physical design

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Palo Alto, CA $170k–$230k/yr Published 5 months ago

FinFET bash ASIC Python Perl

Flexible on stack

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