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Eda Tools Jobs

26 open positions · Updated 1 month ago

Average salary: 158.2k–216.2k/yr

Showing 20 of 26 positions

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Irvine, CA $145k–$175k/yr Published 1 month ago

FinFET RTL Makefile ASIC Python

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Sunnyvale, CA $155k–$185k/yr Published 3 weeks ago

FinFET EDA Makefile ASIC Python

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Austin, TX Published 3 weeks ago

FinFET EDA RTL Makefile ASIC

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RFIC Layout Designer (RFIC Engineering) Visa

SpaceX Redmond, WA $105k–$145k/yr Published 3 months ago

Analog RFIC Python Perl Linux

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RFIC Layout Designer (RFIC Engineering) Visa

SpaceX Irvine, CA $105k–$145k/yr Published 3 months ago

Analog EDA RFIC Python Perl

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RFIC Layout Designer (RFIC Engineering) Visa

SpaceX Sunnyvale, CA $115k–$155k/yr Published 2 months ago

Analog RFIC Python Perl Linux

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Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Irvine, CA $160k–$225k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Palo Alto, CA $170k–$235k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Principal ASIC Design Engineer (Starshield) Visa

SpaceX Irvine, CA $200k–$285k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Principal ASIC Design Engineer (Starshield)

SpaceX Palo Alto, CA $210k–$295k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Principal ASIC Design Engineer (Starshield) Visa

SpaceX Hawthorne, CA $200k–$285k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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IC Package Engineer (Starlink/Akoustis) Visa

SpaceX Bastrop, TX Published 4 months ago

QFN WLP ANSYS CSP EDA

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RTL Design Engineer (Silicon Engineering) Visa

SpaceX Irvine, CA $125k–$175k/yr Published 2 months ago

APB Verilog AHB DSP Python

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX USA $170k–$230k/yr Published 1 day ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX USA Published 1 day ago

FinFET Scripting ASIC EDA tools physical design

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX USA $160k–$220k/yr Published 1 day ago

FinFET bash ASIC Python Perl

Flexible on stack

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Manager, ASIC Design Engineering (Starshield Silicon) Visa

SpaceX Hawthorne, CA $190k–$245k/yr Published 3 weeks ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $160k–$225k/yr Published 6 days ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 6 days ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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