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Lead Verilog Jobs

22 open positions · Updated 3 months ago

Average salary: 138.9k–199.7k/yr

22 roles Senior 6, Mid 5, Principal 4, Intern 3, Junior 3, Lead 1 0–10 yrs experience Austin, TX +7 more Full-time, Internship newest 1 week ago

Also hiring: Python SystemVerilog ASIC C++ VHDL System Verilog

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Manager, ASIC Design Engineering (Starshield Silicon) Visa

SpaceX Hawthorne, CA $190k–$245k/yr Published 3 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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