Direct from source · No middlemen

Systemverilog Jobs

8 open positions · Updated 1 week ago

Average salary: 132.5k–195.8k/yr

Showing 8 of 8 positions

Search with filters →
SpaceX

Join SpaceX as a Design Verification Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 2 weeks ago
Flexible on stack
SpaceX

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 2 weeks ago
Flexible on stack
SpaceX

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $135k–$210k/yr Published 2 weeks ago
Flexible on stack
SpaceX

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$195k/yr Published 2 weeks ago
Flexible on stack
SpaceX

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$175k/yr Published 2 months ago
Flexible on stack
Palantir

Join the American Tech Fellowship to gain skills in deploying AI software and explore opportunities for full-time roles at Palantir.

Palantir North America Published 1 year ago
Flexible on stack