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UVM

20 jobs tagged UVM

Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $125k–$175k/yr Published 1 week ago

Python UVM SystemVerilog MATLAB

Flexible on stack

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Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Sunnyvale, CA $210k–$310k/yr Published 1 week ago

FPGA ASIC VMM Python UVM

Flexible on stack

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Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 1 week ago

Python UVM SystemVerilog MATLAB

Flexible on stack

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Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$300k/yr Published 1 week ago

FPGA ASIC VMM Python UVM

Flexible on stack

Apply →

Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 1 week ago

FPGA ASIC VMM Python UVM

Flexible on stack

Apply →

Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $210k–$300k/yr Published 1 week ago

FPGA ASIC VMM Python UVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$230k/yr Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Sunnyvale, CA $170k–$240k/yr Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

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Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Sunnyvale, CA $135k–$180k/yr Published 1 week ago

Python UVM SystemVerilog MATLAB

Flexible on stack

Apply →

Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$230k/yr Published 1 week ago

VMM Python UVM OVM

Flexible on stack

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Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $125k–$175k/yr Published 1 week ago

Python UVM SystemVerilog MATLAB

Flexible on stack

Apply →

Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

Apply →

Principal ASIC Design Verification Engineer (Starshield) Visa

SpaceX Irvine, CA $200k–$285k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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Sr. ASIC Design Verification Engineer (Starshield) Visa

SpaceX Irvine, CA $160k–$225k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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Lead ASIC Design Verification Engineer (Starshield Satellite Engineering) Visa

SpaceX Hawthorne, CA $160k–$225k/yr Published 4 weeks ago

Python UVM SystemVerilog

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Principal ASIC Design Verification Engineer (Starshield) Visa

SpaceX Palo Alto, CA $210k–$295k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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Principal ASIC Design Verification Engineer (Starshield) Visa

SpaceX Hawthorne, CA $200k–$285k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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Sr. ASIC Design Verification Engineer (Starshield) Visa

SpaceX Hawthorne, CA $160k–$225k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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Sr. ASIC Design Verification Engineer (Starshield) Visa

SpaceX Palo Alto, CA $170k–$235k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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Design Verification Engineer Remote

Cerebras Systems Sunnyvale, CA $120k–$240k/yr Published 6 months ago

Python UVM Perl SystemVerilog

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