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Sr. Technical Project Lead (Silicon Engineering)

Lead complex silicon projects at SpaceX, driving the development of next-generation ASICs for Starlink's global connectivity.

Location
Austin, TX
Compensation
Not disclosed
Level
lead
Type
full time

Posted by employer 3 months ago

First seen on Joblaze 3 months ago

Last verified on the company career page 4 hours ago

Requirements

Experience
8+ years
Education
Bachelor's degree
Visa
Sponsorship available

Not disclosed in this posting: compensation, work arrangement.

Joblaze summary

The Sr. Technical Project Lead for Silicon Engineering at SpaceX is responsible for managing complex ASIC projects from inception to production, ensuring timely delivery and collaboration across various engineering disciplines. This role requires extensive experience in silicon design processes, project management, and proficiency with tools like Jira and Confluence. Ideal candidates will have a strong engineering background, particularly in satellite or consumer product lifecycles, and a proven ability to navigate dynamic project environments. The position is integral to advancing the capabilities of the Starlink network, contributing to SpaceX's mission of expanding global connectivity.

Joblaze insights

  • Listed about 3 months ago — first seen on Joblaze June 28, 2026. Last confirmed on SpaceX's careers page October 9, 2026.
  • This exact title is also open at 3 other locations at SpaceX: Irvine, CA, Palo Alto, CA, Redmond, WA.
  • FPGA appears in 1.3% of 609 comparable lead other roles in United States; RF ASIC Design appears in 0.2% of 609 comparable lead other roles in United States.

Quick facts

How much experience is required?
At least 8 years of relevant experience for this Sr. Technical Project Lead (Silicon Engineering) role.
What's the tech stack?
Joblaze extracted these technologies from the posting: ASIC, Analog ASIC Design, Digital ASIC Design, FPGA, PCB, Project Management.
Does SpaceX sponsor work visas for this role?
Yes — the posting indicates visa sponsorship is available for the right candidate.
What seniority level is this role?
SpaceX targets lead candidates for this position.
Is this full-time or contract?
Full-time for this Sr. Technical Project Lead (Silicon Engineering) role at SpaceX.

From the original posting

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

SR. TECHNICAL PROJECT LEAD (SILICON ENGINEERING)

At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge silicon solutions that will expand the performance and capabilities of the Starlink network.

RESPONSIBILITIES:

  • Leverage experience and technical background to drive complex and challenging silicon projects from kick-off through production
  • Track and communicate schedules and milestones for front-end and backend ASIC development tasks
  • Work with multidisciplinary teams to introduce new silicon to drive fast as possible bring-up
  • Collaborate with silicon team and supply chain to find suppliers for silicon development
  • Lead discussions with internal and external teams to identify and rectify issues

BASIC QUALIFICATIONS:

  • Bachelor’s degree in an engineering discipline
  • 8+ years of Technical Project or Program Management experience

PREFERRED SKILLS AND EXPERIENCE:

  • Master’s degree in an engineering discipline
  • Project leadership of satellite and/or consumer product lifecycle(s)
  • Excellent communication skills both written and verbal to communicate with stakeholders across the company
  • Knowledge and experience with digital and/or analog/RF ASIC design processes from project kick-off to tape-out
  • Knowledge and hands on experience working with external IP and EDA tool vendors
  • Experience working with advance node fabs, package substrate and OSAT partners
  • In-depth understanding of the steps required to go from engineering wafers to mass production
  • Silicon project management skills with experience in most or all of the following areas:
    • Silicon design, bring-up, qualification, and ramp-up to production
    • Pre-silicon testing with emulation or FPGA platform
    • Wafer and package part ATE testing
    • Silicon packaging
    • Silicon reliability and package qualification for mission profile
    • PCB schematics and layout
    • Silicon software drivers and diagnostic scripts
  • Ability to work in a dynamic environment with changing needs and requirements
  • Proficiency in project/program management tools such Jira, Smartsheet, confluence or equivalent tools

ADDITIONAL REQUIREMENTS:

  • Must be willing to travel when needed (typically <10%)
  • Ability to work extended hours and weekends as needed to meet critical deadlines

ITAR REQUIREMENTS:

Standard company text repeated across SpaceX's postings is omitted here.

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