"sinton lifetime" Jobs - Joblaze

Showing 20 of 10497 results

Sr. SI/PI Engineer - Serdes, Satellites (Starlink) Visa

SpaceX Sunnyvale, CA $140k–$190k/yr Published 3 months ago

C++ DDR4 ADS PCB Physics

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Sr. Signal and Power Integrity Engineer, Satellites (Starlink) Visa

SpaceX Sunnyvale, CA $140k–$190k/yr Published 3 months ago

DDR4 ADS Physics DSP HFSS

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Sr. Signal and Power Integrity Engineer, Satellites (Starlink) Remote Visa

SpaceX Redmond, WA $135k–$195k/yr Published 4 months ago

C++ DDR4 ADS Physics DSP

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Irvine, CA $125k–$175k/yr Published 3 days ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enabling global connectivity.

SpaceX Austin, TX Published 3 days ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Sunnyvale, CA $135k–$185k/yr Published 3 days ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $160k–$225k/yr Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Sunnyvale, CA $170k–$235k/yr Published 1 week ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

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Sr. RTL Design Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 2 months ago

Verilog AHB ASIC Python System Verilog

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Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $200k–$285k/yr Published 1 week ago

C++ Verilog Siemens Tessent RTL DFT

Flexible on stack

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Principal DFT Engineer (Silicon Engineering) Visa

Lead the implementation and optimization of DFT architectures for next-generation ASICs at SpaceX.

SpaceX Austin, TX Published 1 week ago

C++ Verilog Siemens Tessent ATE RTL

Flexible on stack

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Principal DFT Engineer (Silicon Engineering) Visa

SpaceX Sunnyvale, CA $210k–$295k/yr Published 3 months ago

C++ Verilog Siemens Tessent UPF RTL

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Sr. Software Engineer, Low Latency Computing (Starlink) Visa

SpaceX Sunnyvale, CA $160k–$225k/yr Published 1 month ago

C++ convex optimization real-time computing numerical optimization graph theory

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RF Silicon Software Engineer (Starlink) Visa

SpaceX Redmond, WA $122.5k–$170k/yr Published 3 months ago

C++ RF PCB FPGA Windows

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Development Test Engineer, Satellites (Starlink) Visa

SpaceX Redmond, WA $105k–$145k/yr Published 1 month ago

Oscilloscopes USB HIL Mechanical spectrum analyzers

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RFIC Layout Designer (RFIC Engineering) Visa

SpaceX Redmond, WA $105k–$145k/yr Published 3 months ago

Analog RFIC Python Perl Linux

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RFIC Layout Designer (RFIC Engineering) Visa

SpaceX Irvine, CA $105k–$145k/yr Published 3 months ago

Analog EDA RFIC Python Perl

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RFIC Layout Designer (RFIC Engineering) Visa

SpaceX Sunnyvale, CA $115k–$155k/yr Published 2 months ago

Analog RFIC Python Perl Linux

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Sr. IC Package Design Engineer (Silicon Engineering) Visa

SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago

SIWave High-Speed Design RF Design ADS Power integrity

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