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Rtl Jobs

58 open positions · Updated 3 days ago

Average salary: 160.2k–229.1k/yr

Showing 20 of 58 positions

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Sr. RTL Design Engineer (Silicon Engineering) Visa

Verilog AHB ASIC Python System Verilog

Bastrop, TX

Published 1 month ago Apply →

Sr. RTL Design Engineer (Silicon Engineering) Visa

Verilog ASIC Python System Verilog SoC

Irvine, CA

$160k–$225k/yr

Published 1 month ago Apply →

Sr. RTL Design Engineer (Silicon Engineering) Visa

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Sunnyvale, CA

$170k–$235k/yr

Published 1 month ago Apply →

RTL Design Engineer (Silicon Engineering) Visa

APB Verilog AHB DSP Python

Irvine, CA

$125k–$175k/yr

Published 1 month ago Apply →

Principal DFT Engineer (Silicon Engineering) Visa

C++ Verilog Siemens Tessent UPF RTL

Sunnyvale, CA

$210k–$295k/yr

Published 2 months ago Apply →

DSP Engineer, Satellites (Starlink) Remote Visa

STM32 PCM/FM BPSK Xilinx QAM

Redmond, WA

$125k–$175k/yr

Published 2 weeks ago Apply →

Lead RTL Design Engineer Remote

Cerebras Systems

PCIe RDMA RTL ASIC Python

Sunnyvale, CA

$175k–$275k/yr

Published 5 months ago Apply →

Sr. ASIC Design Engineer (Silicon Engineering) Visa

Verilog AHB ASIC Python System Verilog

Irvine, CA

$160k–$225k/yr

Published 1 month ago Apply →

Sr. ASIC Design Engineer (Silicon Engineering) Visa

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Sunnyvale, CA

$170k–$235k/yr

Published 3 months ago Apply →

Sr. ASIC Design Engineer (Silicon Engineering) Visa

Quartus II Xilinx Vivado Verilog AHB IES

Redmond, WA

$160k–$225k/yr

Published 3 months ago Apply →

Principal ASIC Design Engineer (Silicon Engineering) Visa

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Irvine, CA

$200k–$285k/yr

Published 3 months ago Apply →

Principal ASIC Design Engineer (Silicon Engineering) Visa

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Sunnyvale, CA

$210k–$295k/yr

Published 3 months ago Apply →

Principal ASIC Design Engineer (Silicon Engineering) Visa

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Redmond, WA

$200k–$285k/yr

Published 3 months ago Apply →

Firmware Engineer

Xilinx Vivado Ethernet MAC Verilog PHY Git

USA

$129k–$171k/yr

Indexed 3 days ago Apply →

3D Physical Design Engineer

Cerebras Systems

AI/ML Calibre ICV Python TCL

Sunnyvale, CA

$150k–$270k/yr

Published 1 year ago Apply →

Senior FPGA Engineer

PCIe RF RFSoC Git Xilinx

Costa Mesa, CA, USA

$191k–$253k/yr

Indexed 3 days ago Apply →

FPGA Verification Engineer, Air Dominance and Strike

PCIe MIL-STD-1553 JESD204C Vivado Makefile

Costa Mesa, CA, USA

$123k–$193k/yr

Indexed 3 days ago Apply →

Design Verification Engineer (Silicon Engineering) Visa

Python UVM SystemVerilog MATLAB

Redmond, WA

$125k–$175k/yr

Published 3 months ago Apply →

Design Verification Engineer (Silicon Engineering) Visa

Python UVM SystemVerilog MATLAB

Sunnyvale, CA

$135k–$185k/yr

Published 3 months ago Apply →

Design Verification Engineer (Silicon Engineering) Visa

Python UVM SystemVerilog MATLAB

Irvine, CA

$125k–$175k/yr

Published 3 months ago Apply →

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