Join Etched as an ASIC Architect to design next-generation AI accelerators with a focus on performance and efficiency.
Posted by employer 1 year ago
First seen on Joblaze 1 month ago
Last verified on the company career page 1 hour ago
What you'll build
- Design chip architectures optimized for AI/ML workloads
- Contribute to power and area estimation methodologies
- Create architectural specifications and interface definitions
- Conduct architectural experiments using simulators
- Support integration efforts with architectural guidance
Must have
- PhD in Computer Science, Electrical Engineering, or related field
- 5+ years of experience in computer architecture or ASIC design
- Strong understanding of computer architecture fundamentals
- Experience with performance modeling and architectural simulation tools
- Hands-on experience designing floating-point datapaths
Nice to have
- Experience with AI/ML accelerator architectures
- RTL design and verification
- Cycle-accurate simulation tools
- Power and performance analysis methodologies
- Hands-on experience with tapeout and silicon bring-up
Practical constraints
- Fully in-person team
Role intensity
30% coding — mostly leadership/strategy
Requirements
- Experience
- 5+ years
- Education
- PhD
Not disclosed in this posting: compensation, visa sponsorship.
Benefits
Joblaze summary
The ASIC Architect at Etched is responsible for designing and optimizing chip architectures specifically tailored for AI inference workloads, focusing on performance and efficiency. This role requires expertise in computer architecture fundamentals, performance modeling, and proficiency in programming languages like Rust, C/C++, or Python. Ideal candidates possess a PhD and at least five years of relevant experience, particularly in ASIC design or computer architecture. Etched fosters a collaborative environment where engineering and research intersect, emphasizing hands-on contributions across disciplines.
Joblaze insights
Quick facts
- Is the ASIC Architect role remote?
- No — this is an on-site role in San Jose.
- How much experience is required?
- At least 5 years of relevant experience for this ASIC Architect role.
- Where is the role based?
- Etched is hiring for this position in San Jose.
- What's the tech stack?
- Joblaze extracted these technologies from the posting: AI/ML, C, C++, Python, Rust, SystemC.
- What seniority level is this role?
- Etched targets senior candidates for this position.
- Is this full-time or contract?
- Full-time for this ASIC Architect role at Etched.
From the original posting
Job Summary
We are seeking a talented Computer Architect to join our architecture team and contribute to the design of next-generation AI accelerators. This role focuses on developing and optimizing compute architectures that deliver exceptional performance and efficiency for inference workloads. You will work on cutting-edge architectural problems and performance modeling with deep cross-functional collaboration to bring innovative chip designs from concept to silicon.
Key Responsibilities
Design and analyze chip architectures optimized for AI/ML workloads, with focus on throughput, latency, and power efficiency
Contribute to power and area estimation methodologies for early-stage, next generation architectural exploration
Create architectural specifications and interface definitions for compute blocks and subsystems
Collaborate with RTL, verification, physical design, and software teams to ensure architectural feasibility and ultimate optimization
Conduct architectural experiments using cycle-accurate simulators and analytical models
Support integration efforts by providing architectural guidance and resolving design challenges
PhD in Computer Science, Electrical Engineering, Computer Engineering, or related field
5+ years of experience in computer architecture, ASIC design, or related fields
Strong understanding of computer architecture fundamentals including pipelines, memory hierarchies, and interconnects
Experience with performance modeling and architectural simulation tools
Hands‑on experience designing and optimizing floating‑point datapaths or arithmetic‑intensive circuits and working with advanced process nodes.
Proficiency in Rust, C/C++, or Python for modeling and analysis
Knowledge of modern processor microarchitecture and design tradeoffs
Strong analytical and problem-solving skills with attention to detail
Excellent communication skills and ability to work in cross-functional teams
Strong candidates may also have experience with
AI/ML accelerator architectures and dataflow optimization
RTL design and verification (Verilog/SystemVerilog)
Cycle-accurate simulation tools (gem5, SystemC, or custom simulators)
Power and performance analysis methodologies
ASIC design flow and physical design constraints
Publishing or presenting at architecture conferences (ISCA, MICRO, HPCA, etc.)
Hands-on experience with tapeout and silicon bring-up
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
Standard company text repeated across Etched's postings is omitted here.