Direct from source · No middlemen

Senior Verilog Jobs

7 open positions · Updated 2 months ago

Average salary: 161.7k–235k/yr

Showing 7 of 7 positions

Search with filters →
SpaceX

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Sunnyvale, CA $170k–$235k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 2 months ago
Flexible on stack
Northwood Space

Join Northwood as a Senior FPGA Engineer to design and implement cutting-edge space communication systems.

Northwood Space Torrance, CA $160k–$275k/yr Published 2 weeks ago
Flexible on stack