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Sr. IC Package Design Engineer (Silicon Engineering)

Join SpaceX as a Sr. IC Package Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

Location
Irvine, CA, United States
Compensation
$165k–$265k/yr
Level
senior
Type
full time

Posted by employer 2 days ago

First seen on Joblaze 23 hours ago

Last verified on the company career page 23 hours ago

Skills & Technologies

What you'll build

  • Drive advanced package selection
  • Responsible for package layout and design verification
  • Coordinate with cross-functional groups
  • Simulate and optimize signal/power integrity
  • Drive methodology and productivity improvements

Must have

  • Bachelor's degree in electrical engineering, computer engineering, or physics
  • 5+ years of experience with IC package design

Nice to have

  • Experience with Co-packaged Optics (CPO)
  • Thorough understanding of signal and power integrity fundamentals
  • Substrate design experience for RF, digital, high-speed and mixed signal die
  • Experience with Cadence APD+/SIP or similar design tools
  • Fluent in SI/PI and EM simulation tools

Practical constraints

  • Ability to work extended hours or weekends as needed

Requirements

Experience
5+ years
Education
Bachelor's degree
Visa
Sponsorship available

Not disclosed in this posting: work arrangement.

Benefits

401k Match Paid Vacation Equity/Stock Options Paid Holidays Health Insurance Parental Leave

Joblaze summary

The Sr. IC Package Design Engineer at SpaceX focuses on developing advanced packaging solutions for custom ASICs and RFICs, crucial for enhancing connectivity through the Starlink satellite system. This role requires expertise in IC package design, signal integrity, and the use of design tools like Cadence APD+, alongside a solid understanding of RF and mixed-signal substrates. Ideal candidates will have over five years of relevant experience and a background in electrical or computer engineering, contributing to a team that is pushing the boundaries of satellite technology.

Joblaze insights

  • Listed today — first seen on Joblaze October 25, 2026. Last confirmed on SpaceX's careers page October 25, 2026.
  • This exact title is also open at 1 other location at SpaceX: Austin, TX, United States.
  • Salary band is above the typical range for comparable tech roles (median ~$129,582).
  • Starts above 11% of 18 comparable senior other roles in United States that list ASIC we track (median $167,500 across 3 companies).
  • ASIC appears in 1.1% of 2602 comparable senior other roles in United States; BGA appears in 0.1% of 2602 comparable senior other roles in United States.

Quick facts

What's the salary range?
SpaceX lists $165,000–$265,000 for this role.
How much experience is required?
At least 5 years of relevant experience for this Sr. IC Package Design Engineer (Silicon Engineering) role.
What's the tech stack?
Joblaze extracted these technologies from the posting: ADS, ASIC, BGA, Cadence APD+, HFSS, RFIC.
Does SpaceX sponsor work visas for this role?
Yes — the posting indicates visa sponsorship is available for the right candidate.
What seniority level is this role?
SpaceX targets senior candidates for this position.
Is this full-time or contract?
Full-time for this Sr. IC Package Design Engineer (Silicon Engineering) role at SpaceX.

From the original posting

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

SR. IC PACKAGE DESIGN ENGINEER (SILICON ENGINEERING)

At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. As an IC Package Design Engineer, you will be an integral part of the IC design team and lead packaging for custom in-house ASICs and RFICs for digital beam formers and modems.

RESPONSIBILITIES:

  • Own and drive advanced package selection, new product BGA configuration and package structure
  • Responsible for package/SIP layout, optimization, design verification and tapeout
  • Interface and coordinate with cross-functional groups throughout SpaceX on new product package selection, feasibility analysis and design
  • Work cross-functionally, understand trade-offs, constraints, and optimizing silicon floor plan, bump and package pin out
  • Simulate and optimize signal/power integrity and RF performance of the package design
  • Drive methodology, innovations, and productivity improvements in package design

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering, computer engineering, or physics
  • 5+ years of experience with IC package design

PREFERRED SKILLS AND EXPERIENCE:

  • Experience with Co-packaged Optics (CPO)
  • Thorough understanding of signal and power integrity fundamentals
  • Substrate design experience for RF, digital, high-speed and mixed signal die
  • Experience with Cadence APD+/SIP or similar design tools
  • Experience in package design electrical review, SI/PI analysis
  • Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, ADS
  • Experience in package design for manufacturing reviews
  • Familiar with BGA package substrate technologies
  • Strong problem solving skills with strong engineering fundamentals

ADDITIONAL REQUIREMENTS:

  • Ability to work extended hours or weekends as needed to meet mission critical deadlines
COMPENSATION AND BENEFITS:

Pay Range:
Level 3: $165,000.00 - $265,000.00

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees accrue paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law.

ITAR REQUIREMENTS:

Standard company text repeated across SpaceX's postings is omitted here.

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