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RTL Design Engineer (Silicon Engineering) Visa

SpaceX Irvine, CA $125k–$175k/yr Published 3 months ago

APB Verilog AHB DSP Python

Principal ASIC Design Engineer (Starshield) Visa

SpaceX Irvine, CA $200k–$285k/yr Published 3 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Sr. ASIC Design Engineer (Starshield)

SpaceX Irvine, CA $160k–$225k/yr Published 3 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Principal Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$300k/yr Published 1 month ago

FPGA ASIC VMM Python UVM

Flexible on stack

Sr. Technical Project Lead (Silicon Engineering) Visa

Lead complex silicon projects at SpaceX, developing next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$260k/yr Published 1 week ago

RF Design Project Management Silicon Engineering PCB FPGA

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