joblaze

Showing 4 of 4 results

SpaceX
FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$175k/yr Published 1 week ago
C++ Xilinx Vivado Verilog DSP HDL simulators
Flexible on stack
Apply →
SpaceX
RFIC Layout Designer (RFIC Engineering) Visa
SpaceX Redmond, WA $105k–$145k/yr Published 3 months ago
Analog RFIC Python Perl Linux
Apply →
SpaceX
Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 1 week ago
Verilog ASIC Python System Verilog SoC
Flexible on stack
Apply →
SpaceX
Sr. RFIC Layout Designer (RFIC Engineering) Visa
SpaceX Redmond, WA $135k–$195k/yr Published 3 months ago
Analog EDA RFIC Python Perl
Apply →

Related searches

Eda Eda Remote Senior Eda Junior Eda Eda in London Eda in New York Python in Redmond Rfic in Redmond Verilog in Redmond