"asic design" Jobs

220 open tech roles matching “asic design”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, ASIC, C++. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 220 results

Etched

Join Etched as a Power Validation Engineer to lead power characterization for ASICs and enhance system design decisions.

Etched San Jose Published 5 months ago
Flexible on stack
SpaceX

Join SpaceX as an RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Redmond, WA $125k–$195k/yr Published 3 months ago
SpaceX

Join SpaceX as an RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $125k–$195k/yr Published 3 months ago
SpaceX

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Irvine, CA $125k–$175k/yr Published 4 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $135k–$185k/yr Published 4 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enabling global connectivity.

SpaceX Austin, TX Published 4 months ago
Flexible on stack
SpaceX

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 3 weeks ago
Flexible on stack
SpaceX

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $135k–$175k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 3 weeks ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Redmond, WA $165k–$270k/yr Published 3 months ago
Flexible on stack
Etched

Join Etched as an Electrical Platform Intern to work on cutting-edge systems and silicon in a hands-on environment.

Etched San Jose Published 8 months ago
CesiumAstro

Join Jariet Technologies as a Principal Verification Engineer to develop cutting-edge verification methodologies for high-speed digital communication SoCs.

CesiumAstro Aliso Viejo, CA Published 3 weeks ago
SpaceX

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $165k–$265k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RFIC Design Engineer to develop cutting-edge RFICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $175k–$280k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as an RFIC Engineer to develop next-generation RFICs for national security applications in a fast-paced environment.

SpaceX Hawthorne, CA $125k–$175k/yr Published 5 months ago
K2 Space

Join K2 Space as a Senior FPGA Prototyping Engineer to drive the development of next-gen communications ASICs in a fast-paced environment.

K2 Space United States - Remote $120k–$225k/yr Published 2 months ago
Flexible on stack
Etched

Ensure robust quality systems for advanced AI hardware builds as a Product Quality Engineer at Etched in San Jose.

Etched San Jose Published 4 months ago
Flexible on stack
Etched

Join the Internal Acceleration team as a Research Engineer to build innovative tools for AI-driven hardware development.

Etched San Jose $150k–$400k/yr Published 1 week ago