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Tcl Jobs at SpaceX

19 open positions · Updated 3 weeks ago

Average salary: 163.3k–228.3k/yr

19 of 2313 open roles Senior 9, Mid 5, Principal 4, Lead 1 2–10 yrs experience Austin, TX +4 more Full-time newest 3 weeks ago

Also hiring: Python Perl ASIC Makefile C++ DFT

Showing 19 of 19 positions

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Principal DFT Engineer (Silicon Engineering) Visa

Lead the implementation and optimization of DFT architectures for next-generation ASICs at SpaceX.

SpaceX Austin, TX Published 3 weeks ago

C++ Verilog Siemens Tessent UPF DFT

Flexible on stack

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Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $220k–$355k/yr Published 3 weeks ago

C++ Verilog Siemens Tessent DFT ASIC

Flexible on stack

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Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$340k/yr Published 3 weeks ago

C++ Verilog Siemens Tessent DFT ASIC

Flexible on stack

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EDA Engineer (RFIC Engineering) Visa

Join SpaceX as an EDA Engineer to enhance IC design environments for cutting-edge satellite technology.

SpaceX Irvine, CA $125k–$175k/yr Published 1 month ago

Cadence Virtuoso Shell EMX Makefile SKILL

Flexible on stack

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EDA Engineer (RFIC Engineering) Visa

Join SpaceX as an EDA Engineer to support and improve IC design environments for cutting-edge satellite technology.

SpaceX Redmond, WA $125k–$175k/yr Published 1 month ago

Cadence Virtuoso EMX Makefile SKILL Python

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enabling global connectivity.

SpaceX Austin, TX Published 2 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Irvine, CA $125k–$175k/yr Published 2 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. Full Chip Physical Verification Engineer to develop cutting-edge silicon for the Starlink network.

SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago

PERC ESD IC Validator Calibre Makefile

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $135k–$185k/yr Published 2 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Palo Alto, CA $170k–$230k/yr Published 2 months ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 2 months ago

FinFET bash ASIC Python Perl

Flexible on stack

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Palo Alto, CA $155k–$185k/yr Published 3 months ago

FinFET EDA Makefile ASIC Python

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Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Visa

SpaceX Palo Alto, CA $170k–$230k/yr Published 3 months ago

IC Validator Calibre Makefile ASIC Python

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Manager, ASIC Design Engineering (Starshield Silicon) Visa

SpaceX Hawthorne, CA $190k–$245k/yr Published 3 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 3 months ago

IC Validator Calibre Makefile ASIC Python

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Austin, TX Published 3 months ago

FinFET EDA RTL Makefile ASIC

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Principal ASIC Design Engineer (Starshield) Visa

SpaceX Hawthorne, CA $200k–$285k/yr Published 4 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 4 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Irvine, CA $145k–$175k/yr Published 4 months ago

FinFET RTL Makefile ASIC Python

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