TCL Jobs in San Francisco

8 open positions · Updated 1 month ago

Average salary (USD/year): 132.3k–206.8k/yr

8 roles Intern 4, Mid 3, Senior 1 2–5 yrs experience San Francisco, South San Francisco, California, United States Full-time, Internship newest 1 month ago

Also hiring: SystemVerilog UVM Verilog FPGA Xilinx Vivado

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FPGA Intern (Summer 2027) Visa

Join Astranis as an FPGA Intern to work on hardware development for advanced satellite technology.

Astranis San Francisco $29–$29/hr Published 1 month ago

Verilog Vivado IDE Xilinx FPGA UVM

Flexible on stack

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FPGA Associate (Winter 2027)

Join Astranis as an FPGA Associate to work on hardware development for advanced satellite technology.

Astranis San Francisco $1.9k–$1.9k/wk Published 1 month ago

Verilog Vivado IDE Xilinx FPGA TCL

Flexible on stack

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FPGA Intern (Winter 2027)

Join Astranis as an FPGA Intern to work on hardware development for advanced satellite technology.

Astranis San Francisco $29–$29/hr Published 1 month ago

Verilog Xilinx Vivado FPGA UVM

Flexible on stack

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FPGA Associate (Summer 2027)

Join Astranis as an FPGA Associate to work on hardware development for advanced satellite systems.

Astranis San Francisco $1.9k–$1.9k/wk Published 1 month ago

Verilog Xilinx Vivado FPGA UVM

Flexible on stack

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Senior FPGA Engineer Visa

Join Astranis as a Senior FPGA Engineer to design and verify RTL for advanced satellite systems.

Astranis San Francisco $175k–$240k/yr Published 2 years ago

C++ Verilog C DSP Vivado

Flexible on stack

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Analog IC Layout Engineer

Join Neuralink as an Analog IC Layout Engineer to innovate in chip design for brain-computer interfaces.

Neuralink South San Francisco, California, United States $83k–$139k/yr Published 6 months ago

Mixed Signal Circuits Analog Circuits Shell FinFET SKILL

Flexible on stack

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Digital Verification Engineer

Join Neuralink as a Digital Verification Engineer to impact the future of brain-computer interfaces.

Neuralink South San Francisco, California, United States $131k–$243k/yr Published 2 months ago

ARM Unix Makefile Python UVM

Flexible on stack

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FPGA Engineer Visa

Join Astranis as an FPGA Engineer to design and verify high-performance systems for advanced satellites.

Astranis San Francisco $140k–$205k/yr Published 2 years ago

RF Verilog Vivado IDE DSP DAC

Flexible on stack

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