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Upf Jobs in Palo Alto

1 open positions · Updated 2 weeks ago

1 role Mid 1 1 yrs experience Palo Alto, CA Full-time newest 2 weeks ago

Also hiring: ASIC ATPG DFT RTL Synthesis SystemVerilog

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ASIC/SOC DFT Engineer (Silicon Engineering) Visa

Join SpaceX as an ASIC/SOC DFT Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Palo Alto, CA $135k–$175k/yr Published 2 weeks ago

Verilog UPF RTL DFT ASIC

Flexible on stack

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