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Xilinx Vivado Jobs

5 open positions · Updated 1 week ago

Average salary (USD/year): 168.8k–232.5k/yr
5 roles Senior 2, Lead 1, Mid 1, Principal 1 1–8 yrs experience Hawthorne, CA +2 more Full-time newest 1 week ago
Also hiring: Python Verilog Altera Quartus II System Verilog IES Questa

Showing 5 of 5 positions

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Ambiq
Senior Engineer, FPGA

Drive the development of FPGA images for pre-silicon prototyping at Ambiq, focusing on energy-efficient semiconductor solutions.

Ambiq Singapore Published 2 months ago
C++ Xilinx Vivado MSPI Verilog USB
Flexible on stack
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SpaceX
FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$175k/yr Published 3 months ago
C++ Xilinx Vivado Verilog DSP HDL simulators
Flexible on stack
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SpaceX
Manager, ASIC Design Engineering (Starshield Silicon) Visa
SpaceX Hawthorne, CA $190k–$245k/yr Published 4 months ago
Xilinx Vivado Verilog IES Altera Quartus II Spyglass
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SpaceX
Sr. ASIC Design Engineer (Starshield)
SpaceX Hawthorne, CA $160k–$225k/yr Published 5 months ago
Xilinx Vivado Verilog IES Altera Quartus II Spyglass
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SpaceX
Principal ASIC Design Engineer (Starshield) Visa
SpaceX Hawthorne, CA $200k–$285k/yr Published 5 months ago
Xilinx Vivado Verilog IES Altera Quartus II Spyglass
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