Software Engineer, Chip Design
Join Ricursive Intelligence as a Software Engineer to build scalable systems for chip design using AI-driven methods.
Posted by employer 1 month ago
First seen on Joblaze 1 month ago
Last verified on the company career page 1 day ago
AI in the day-to-day
Deploy AI-driven methods to automate design analysis, optimization, and iteration across the flow.
Requirements
- Education
- Bachelor's degree
Not disclosed in this posting: compensation, years of experience, work arrangement, visa sponsorship.
Joblaze summary
In this role, the Software Engineer focuses on developing and scaling the infrastructure for the RTL-to-GDS flow, enhancing the efficiency of chip design processes. Key skills include strong programming in languages like Python and C++, along with a solid understanding of digital chip design and EDA tools. This position is ideal for someone with a technical background in computer science or electrical engineering, particularly those who thrive in tackling complex, ambiguous challenges. Ricursive Intelligence is at the forefront of AI-driven chip design, offering a dynamic environment for innovation.
Joblaze insights
Quick facts
- What's the tech stack?
- Joblaze extracted these technologies from the posting: AI/ML, C++, EDA, Java, Python.
- What seniority level is this role?
- Ricursive Intelligence targets mid-level candidates for this position.
- Is this full-time or contract?
- Full-time for this Software Engineer, Chip Design role at Ricursive Intelligence.
From the original posting
ABOUT THE ROLE
As a Software Engineer at Ricursive, you’ll build the systems and infrastructure that power our chip design flow. You’ll work across the broader design stack, improving how we run, evaluate, and iterate on complex problems at scale. This includes building reliable execution infrastructure, developing tooling that connects different stages of the flow, and improving performance and scalability.
You’ll run against real designs with real constraints, debug issues that only emerge at scale, and make engineering tradeoffs around quality, runtime, robustness, and deadlines.
WHAT YOU WILL DO
Develop and scale the infrastructure behind our chip design flow, optimizing for scalable systems that can support hierarchical design, advanced process nodes, and increasingly complex design constraints.
Analyze design metrics like timing violations, congestion, routing issues, and other design problems, helping the overall flow converge faster toward better PPA.
Deploy AI-driven methods to automate design analysis, optimization, and iteration across the flow.
MINIMUM QUALIFICATIONS
Bachelor’s degree in Computer Science, Electrical Engineering, or a related technical field.
Strong programming skills in Python, C++, Java, or a comparable language. Comfortable using modern AI-assisted development tools to navigate complex codebases, debug problems, and accelerate engineering workflows.
Working understanding of the digital chip design flow, including the major stages from RTL through physical design and signoff.
Demonstrated ability to take ownership of ambiguous technical problems, ramp quickly in unfamiliar areas, and drive work through to production.
PREFERRED QUALIFICATIONS
Master’s or PhD in Computer Science, Electrical Engineering, or a related technical field.
Experience with semiconductor design, distributed systems, or optimization.
Familiarity with design automation algorithms in one or more areas of the chip design flow, such as placement, timing analysis, RC extraction, netlist processing.
Demonstrated and quantified the PPA benefit of using AI/ML tooling
Standard company text repeated across Ricursive Intelligence's postings is omitted here.
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