"systemverilog" Jobs

9 open tech roles matching “systemverilog”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, SystemVerilog, VHDL. Every listing is re-checked daily and closed roles are removed.

Showing 9 of 9 results

Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $125k–$195k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

Flexible on stack

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Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 1 month ago

Python UVM SystemVerilog MATLAB

Flexible on stack

Apply →

Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $135k–$210k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

Flexible on stack

Apply →

Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$195k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

Flexible on stack

Apply →

RTL Design Engineer (Silicon Engineering) Visa

SpaceX Irvine, CA $125k–$175k/yr Published 5 months ago

APB Verilog AHB DSP Python

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New Graduate Engineer, Silicon Engineering Visa

Join SpaceX as a New Graduate Engineer in Silicon Engineering, working on next-gen silicon for the Starlink program.

SpaceX Palo Alto, CA $135k–$175k/yr Published 1 week ago

ADS Verilog HFSS RTL Momentum

Flexible on stack

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New Graduate Engineer, Silicon Engineering Visa

Join SpaceX as a New Graduate Engineer in Silicon Engineering to develop next-generation silicon for the Starlink program.

SpaceX Redmond, WA $125k–$165k/yr Published 1 week ago

ADS Verilog DSP HFSS RTL

Flexible on stack

Apply →

New Graduate Engineer, Silicon Engineering Visa

Join SpaceX as a New Graduate Engineer in Silicon Engineering to develop next-generation silicon for the Starlink program.

SpaceX Irvine, CA $125k–$160k/yr Published 1 week ago

ADS Verilog HFSS RTL Momentum

Flexible on stack

Apply →

FPGA/ASIC Design Engineer (Silicon Engineering) Visa

Join SpaceX as an FPGA/ASIC Design Engineer to develop cutting-edge chips for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $125k–$175k/yr Published 3 months ago

C++ Xilinx Vivado Verilog DSP HDL simulators

Flexible on stack

Apply →