"asic" Jobs

43 open tech roles matching “asic”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, ASIC, Perl. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 43 results

Sr. IC Package Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. IC Package Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

SpaceX Austin, TX Published 2 months ago

SIWave BGA ADS HFSS RFIC

Flexible on stack

Apply →

Sr. IC Package Design Engineer (Silicon Engineering) Visa

SpaceX Irvine, CA $160k–$225k/yr Published 4 months ago

SIWave High-Speed Design RF Design ADS Power integrity

Apply →

Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$260k/yr Published 2 weeks ago

ASIC VMM Python UVM OVM

Flexible on stack

Apply →

Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$260k/yr Published 2 weeks ago

ASIC VMM Python UVM OVM

Flexible on stack

Apply →

Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 2 weeks ago

ASIC VMM Python UVM OVM

Flexible on stack

Apply →

Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $175k–$280k/yr Published 2 weeks ago

ASIC VMM Python UVM OVM

Flexible on stack

Apply →

Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Austin, TX Published 2 months ago

FinFET Scripting ASIC EDA tools physical design

Apply →

Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 2 months ago

FinFET bash ASIC Python Perl

Flexible on stack

Apply →

Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Sunnyvale, CA $170k–$230k/yr Published 2 months ago

FinFET bash ASIC Python Perl

Flexible on stack

Apply →

Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Irvine, CA $125k–$175k/yr Published 2 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

Apply →

Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $135k–$185k/yr Published 2 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

Apply →

Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enabling global connectivity.

SpaceX Austin, TX Published 2 months ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

Apply →

Silicon Product and Test Engineer

Drive post-silicon productization of bitcoin mining ASICs in a cross-functional role at Block.

Block Bay Area, CA, United States of America $139k–$245.4k/yr Published 7 months ago

DOE ATE yield optimization silicon characterization JMP

Flexible on stack

Apply →

Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 3 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

Apply →

Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enhancing global connectivity.

SpaceX Redmond, WA $160k–$225k/yr Published 2 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

Apply →

Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Sunnyvale, CA $170k–$235k/yr Published 2 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

Apply →

Sr. RTL Design Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 4 months ago

Verilog AHB ASIC Python System Verilog

Apply →

Sr. RTL Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. RTL Design Engineer to develop cutting-edge ASICs for the Starlink network, enabling global connectivity.

SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago

Verilog ASIC Python System Verilog SoC

Flexible on stack

Apply →

Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 2 months ago

IC Validator Calibre Makefile ASIC Python

Apply →

Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. Full Chip Physical Verification Engineer to develop cutting-edge silicon for the Starlink network.

SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago

PERC ESD IC Validator Calibre Makefile

Flexible on stack

Apply →