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Senior Asic Jobs

49 open positions · Updated 1 month ago

Average salary: 157.5k–229.6k/yr

Showing 20 of 49 positions

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Electrical Engineer

Cerebras Systems Sunnyvale, CA $150k–$260k/yr Published 3 months ago

Electrical Engineering Python

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Sr. IC Package Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. IC Package Design Engineer to develop cutting-edge ASICs for space and ground infrastructures.

SpaceX Austin, TX Published 1 week ago

SIWave BGA ADS HFSS RFIC

Flexible on stack

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Sr. IC Package Design Engineer (Silicon Engineering) Visa

SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago

SIWave High-Speed Design RF Design ADS Power integrity

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System Software Engineer (Embedded)

Cerebras Systems Sunnyvale, CA $175k–$275k/yr Published 3 months ago

C++ Embedded Systems Golang distributed systems Cluster-level Orchestration

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Advanced Technology: Compiler Engineer

Cerebras Systems Sunnyvale, CA; Vancouver, British Columbia, Canada Published 2 months ago

C++ wafer-scale architecture Machine Learning compiler dataflow programming

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 6 days ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Sunnyvale, CA $170k–$230k/yr Published 6 days ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Austin, TX Published 6 days ago

FinFET Scripting ASIC EDA tools physical design

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3D Physical Design Engineer

Cerebras Systems Sunnyvale, CA $150k–$270k/yr Published 1 year ago

AI/ML Calibre ICV Python TCL

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$230k/yr Published 1 week ago

VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Sunnyvale, CA $170k–$240k/yr Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$230k/yr Published 1 week ago

ASIC VMM Python UVM OVM

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Irvine, CA $125k–$175k/yr Published 3 days ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Sunnyvale, CA $135k–$185k/yr Published 3 days ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Sr. ASIC DFT Engineer (Silicon) Visa

Join SpaceX as a Sr. ASIC DFT Engineer to develop next-generation ASICs for the Starlink network, enabling global connectivity.

SpaceX Austin, TX Published 3 days ago

C++ automated test equipment ASICs Siemens Tessent DFT

Flexible on stack

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Advanced Technology: R&D Engineer - AI/ML, HPC

Cerebras Systems Sunnyvale, CA; Toronto, Ontario, Canada; Vancouver, British Columbia, Canada Published 1 month ago

C++ AI/ML Python

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Sr. ASIC Design Engineer (Starshield)

SpaceX Irvine, CA $160k–$225k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 2 months ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Verification Engineer (Starshield) Visa

SpaceX Irvine, CA $160k–$225k/yr Published 1 month ago

Python UVM SystemVerilog MATLAB

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