How much experience is required?

At least 20 years of relevant experience for this Principal SoC RTL Engineer role.

What's the tech stack?

Joblaze extracted these technologies from the posting: IP, MCU, SoC, SystemVerilog, Verilog.

What seniority level is this role?

Ambiq targets principal-level candidates for this position.

Is this full-time or contract?

Full-time for this Principal SoC RTL Engineer role at Ambiq.

Principal SoC RTL Engineer at Ambiq

Joblaze summary

The Principal SoC RTL Engineer at Ambiq is responsible for ensuring pre-tapeout quality for digital SoC modules, focusing on architecture and RTL development for next-generation silicon. This role requires expertise in Verilog/SystemVerilog, along with a strong background in integrating third-party IP and collaborating with verification and physical design teams to meet timing and power targets. Ideal candidates will have extensive experience in SoC design and a proactive approach to problem-solving, making this position suitable for seasoned professionals eager to influence production outcomes. Ambiq fosters a collaborative environment that emphasizes innovation and continuous learning.

Joblaze insights

Listed 9 days ago on Joblaze — tracked directly from Ambiq's career page.
Ambiq has 45 other open roles including Sr. Director, SoC Architecture, Software Architect, Staff Engineer, Product Test .
60 active SystemVerilog roles on Joblaze right now.
40 active Verilog roles on Joblaze right now.
35 active SoC roles on Joblaze right now.
Typical SystemVerilog salary we track runs $125,000–$170,000 (median $135,000, across 37 roles).

Quick facts

How much experience is required?: At least 20 years of relevant experience for this Principal SoC RTL Engineer role.
What's the tech stack?: Joblaze extracted these technologies from the posting: IP, MCU, SoC, SystemVerilog, Verilog.
What seniority level is this role?: Ambiq targets principal-level candidates for this position.
Is this full-time or contract?: Full-time for this Principal SoC RTL Engineer role at Ambiq.

From the original posting

Company Overview

Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.

Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.

Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.

We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.

At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.

If that's you, join us — the intelligence everywhere revolution starts here.

We’re looking for a Principal RTL Engineer to own pre-tapeout quality for digital SoC modules on our MCU platforms and drive architecture, microarchitecture, and RTL development for next-generation silicon.

In this role, you’ll develop Verilog/SystemVerilog RTL for complex IPs and SoCs, evaluate and integrate 3rd-party IP, partner closely with verification and FPGA teams on test planning and debug, collaborate with physical design to hit timing and power targets, and drive LINT, CDC, RDC, silicon bring-up, and validation quality.

This is a hands-on principal IC role for an engineer who has built and debugged complex SoCs, knows how to raise quality before tapeout, and wants direct impact on production silicon.

Responsibilities

Own and be responsible for pre-tape out quality for digital SOC modules on the MCU
Explore architecture and develop micro-architecture.
RTL development for IPs and SOCs using Verilog
3rd party IP identification, selection, and integration
Collaboration with verification and FPGA teams in test plan development and debug
Collaborate with the Physical Design team to close the design on timing and power targets
Assist in silicon bring-up and validation;
Run tool for quality checks (LINT, CDC, and RDC) and fix/waive the issues

Requirements

Bachelor’s degree in Electronics Engineering, Electrical Engineering, Instrumentation & Control Engineering, or a related field, plus 20 years of experience.
Possess deep and broad knowledge of current and emerging SOC design technologies.
Have expert knowledge in designing, implementing, and troubleshooting IPs and SOC
Demonstrate a deep understanding of customer needs and the competitive landscape.
Ability to estimate the impact of and help plan and lead the implementations and have a positive impact on the entire output
Can architect and guide programs across the full range of technical areas.

What you need

We're seeking passionate technologists who thrive on pushing the boundaries, solving complex challenges, and driving transformative solutions.

At Ambiq, you'll collaborate with a dynamic team that values relentless innovation, customer-centric thinking, and continuous learning. If you're a self-motivated, creative problem-solver eager to push technological limits and make a meaningful impact in energy efficiency, this is your opportunity to grow, excel, and turn groundbreaking ideas into reality.

Most importantly, the successful candidate will be able to live the Ambiq Shared Values:

Innovate: We tenaciously find ways to break down the barriers to possible solutions
Collaborate: We proactively communicate and encourage each other to be better.
Focus: We keep the voice of the customer at the center of everything we do.
Learn: We strive for continuous improvement and are always curious.
Achieve: We execute on quality and follow through on our commitments.

Principal SoC RTL Engineer

Requirements

Similar positions