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Principal Verilog Jobs

22 open positions · Updated 3 weeks ago

Average salary: 138.9k–199.7k/yr
22 roles Senior 6, Mid 5, Principal 4, Intern 3, Junior 3, Lead 1 0–10 yrs experience Austin, TX +7 more Full-time, Internship newest 1 week ago
Also hiring: Python SystemVerilog ASIC C++ VHDL System Verilog

Showing 4 of 4 positions

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SpaceX
Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to develop next-generation ASICs for the Starlink network, enhancing global connectivity.

SpaceX Palo Alto, CA $220k–$355k/yr Published 3 weeks ago
C++ Verilog Siemens Tessent DFT ASIC
Flexible on stack
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SpaceX
Principal DFT Engineer (Silicon Engineering) Visa

Lead the implementation and optimization of DFT architectures for next-generation ASICs at SpaceX.

SpaceX Austin, TX Published 3 weeks ago
C++ Verilog Siemens Tessent UPF DFT
Flexible on stack
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SpaceX
Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $210k–$340k/yr Published 3 weeks ago
C++ Verilog Siemens Tessent DFT ASIC
Flexible on stack
Apply →
SpaceX
Principal ASIC Design Engineer (Starshield) Visa
SpaceX Hawthorne, CA $200k–$285k/yr Published 4 months ago
Xilinx Vivado Verilog IES Altera Quartus II Spyglass
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