"tcl" Jobs

9 open tech roles matching “tcl”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: SystemVerilog, Python, Perl. Every listing is re-checked daily and closed roles are removed.

Showing 9 of 9 results

Senior FPGA Engineer (TS/SCI)

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Los Angeles, CA $120k–$225k/yr Published 1 month ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

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Senior ASIC Emulation Engineer

Lead the bring-up, deployment, and optimization of pre-silicon emulation platforms in a high-growth satellite company.

K2 Space Seattle, WA $170k–$250k/yr Published 1 month ago

palladium ZeBu Python Veloce Perl

Flexible on stack

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Senior ASIC Emulation Engineer

Join K2 Space as a Senior ASIC Emulation Engineer to lead the deployment and optimization of pre-silicon emulation platforms.

K2 Space United States - Remote $170k–$250k/yr Published 1 month ago

C++ palladium ZeBu Python Veloce

Flexible on stack

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Senior FPGA Engineer

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Seattle, WA $120k–$225k/yr Published 2 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

Apply →

Senior FPGA Engineer

Join K2 Space as a Senior FPGA Engineer to develop and verify FPGA firmware for cutting-edge spacecraft.

K2 Space Los Angeles, CA $120k–$225k/yr Published 5 months ago

C++ Rust Python SystemVerilog VHDL

Flexible on stack

Apply →

Principal ASIC Design Verification Engineer

Join K2 Space as a Principal ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $190k–$285k/yr Published 2 months ago

C++ Python UVM Perl TCL

Flexible on stack

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Senior ASIC Design Verification Engineer

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $170k–$250k/yr Published 2 months ago

Python UVM Perl TCL SystemVerilog

Flexible on stack

Apply →

Principal ASIC Design Verification Engineer

Join K2 Space as a Principal ASIC Design Verification Engineer to shape first-generation silicon in a high-growth environment.

K2 Space United States - Remote $190k–$285k/yr Published 2 months ago

C++ Python UVM Perl TCL

Flexible on stack

Apply →

Senior ASIC Design Verification Engineer

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space United States - Remote $170k–$250k/yr Published 2 months ago

Python UVM Perl TCL SystemVerilog

Flexible on stack

Apply →