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TCL

22 jobs tagged TCL

Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Irvine, CA $160k–$220k/yr Published 4 days ago

FinFET bash ASIC Python Perl

Flexible on stack

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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Visa

Join SpaceX as a Sr. SOC/ASIC Physical Design Engineer to develop cutting-edge silicon for space and ground infrastructures.

SpaceX Sunnyvale, CA $170k–$230k/yr Published 4 days ago

FinFET bash ASIC Python Perl

Flexible on stack

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Principal DFT Engineer (Silicon Engineering) Visa

Join SpaceX as a Principal DFT Engineer to lead the development of next-generation ASICs for the Starlink network.

SpaceX Irvine, CA $200k–$285k/yr Published 1 week ago

C++ Verilog Siemens Tessent RTL DFT

Flexible on stack

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Principal DFT Engineer (Silicon Engineering) Visa

Lead the implementation and optimization of DFT architectures for next-generation ASICs at SpaceX.

SpaceX Austin, TX Published 1 week ago

C++ Verilog Siemens Tessent ATE RTL

Flexible on stack

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Physical Design Engineer

Cerebras Systems Bengaluru, Karnataka, India Published 3 weeks ago

AI/ML Calibre ICV Python TCL

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Principal ASIC Design Engineer (Starshield) Visa

SpaceX Irvine, CA $200k–$285k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Irvine, CA $160k–$225k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Sunnyvale, CA $155k–$185k/yr Published 4 weeks ago

FinFET EDA Makefile ASIC Python

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Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Visa

SpaceX Sunnyvale, CA $170k–$230k/yr Published 4 weeks ago

IC Validator Calibre Makefile ASIC Python

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Austin, TX Published 4 weeks ago

FinFET EDA RTL Makefile ASIC

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Manager, ASIC Design Engineering (Starshield Silicon) Visa

SpaceX Hawthorne, CA $190k–$245k/yr Published 4 weeks ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Visa

SpaceX Austin, TX Published 4 weeks ago

IC Validator Calibre Makefile ASIC Python

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Principal ASIC Design Engineer (Starshield)

SpaceX Palo Alto, CA $210k–$295k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Sr. ASIC Design Engineer (Starshield)

SpaceX Hawthorne, CA $160k–$225k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Principal DFT Engineer (Silicon Engineering) Visa

SpaceX Sunnyvale, CA $210k–$295k/yr Published 3 months ago

C++ Verilog Siemens Tessent UPF RTL

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Sr. ASIC Design Engineer (Starshield)

SpaceX Palo Alto, CA $170k–$235k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Principal ASIC Design Engineer (Starshield) Visa

SpaceX Hawthorne, CA $200k–$285k/yr Published 1 month ago

Xilinx Vivado Verilog IES Altera Quartus II Spyglass

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Physical Design Engineer II (Silicon Engineering) Visa

SpaceX Irvine, CA $145k–$175k/yr Published 1 month ago

FinFET RTL Makefile ASIC Python

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Lead RTL Design Engineer Remote

Cerebras Systems Sunnyvale, CA $175k–$275k/yr Published 6 months ago

PCIe RDMA RTL ASIC Python

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AI Silicon Physical Design Engineer

Cerebras Systems Remote, California, United States; Sunnyvale, CA $150k–$250k/yr Published 1 year ago

Design Compiler ICC2 AI/ML Calibre ICV

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3D Physical Design Engineer

Cerebras Systems Sunnyvale, CA $150k–$270k/yr Published 1 year ago

AI/ML Calibre ICV Python TCL

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Senior IC Design Engineer – IO Signal Integrity & Power Delivery

Cerebras Systems Sunnyvale, CA $200k–$275k/yr Published 2 years ago

High-Speed Interface Power integrity HSPICE FinFET Signal integrity

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