joblaze

Showing 4 of 4 results

SpaceX
Design Verification Engineer (Silicon Engineering) Visa

Join SpaceX as a Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $125k–$175k/yr Published 1 month ago
Python UVM SystemVerilog MATLAB
Flexible on stack
Apply →
SpaceX
RTL Design Engineer (Silicon Engineering) Visa
SpaceX Irvine, CA $125k–$175k/yr Published 3 months ago
APB Verilog AHB DSP Python
Apply →
SpaceX
Principal ASIC Design Verification Engineer (Starshield) Visa
SpaceX Irvine, CA $200k–$285k/yr Published 2 months ago
Python UVM SystemVerilog MATLAB
Apply →
SpaceX
Sr. ASIC Design Verification Engineer (Starshield) Visa
SpaceX Irvine, CA $160k–$225k/yr Published 2 months ago
Python UVM SystemVerilog MATLAB
Apply →

Related searches

Systemverilog Systemverilog Remote Senior Systemverilog Junior Systemverilog Systemverilog in London Systemverilog in New York Systemverilog in Irvine Python in Irvine Matlab in Irvine