"chip design" Jobs

335 open tech roles matching “chip design”, taken straight from company career pages — not reposted from other job boards. Most in demand right now: Python, C++, ASIC. Every listing is re-checked daily and closed roles are removed.

Showing 20 of 335 results

SpaceX

Join SpaceX as a Sr. DSP Systems Engineer to develop cutting-edge ASICs for satellite broadband systems.

SpaceX Palo Alto, CA $175k–$280k/yr Published 1 month ago
Flexible on stack
Mythic

Join Mythic as a Design Verification Engineer to develop and verify designs for next-generation AI processors.

Mythic Austin, TX $120k–$225k/yr Published 11 months ago
AI-first team
K2 Space

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space United States - Remote $170k–$250k/yr Published 2 months ago
Flexible on stack
K2 Space

Join K2 Space as a Senior ASIC Design Verification Engineer to shape first-generation silicon in a fast-paced, high-growth environment.

K2 Space Seattle, WA $170k–$250k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as an AMS Verification Engineer to develop cutting-edge RFICs for the Starlink network.

SpaceX Irvine, CA $125k–$160k/yr Published 3 weeks ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. IC Packaging Test Engineer to develop and release production test solutions for advanced semiconductor packaging.

SpaceX Bastrop, TX Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Redmond, WA $165k–$260k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Palo Alto, CA $175k–$280k/yr Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Austin, TX Published 2 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for the Starlink network.

SpaceX Irvine, CA $165k–$260k/yr Published 2 months ago
Flexible on stack
Ambiq

Lead the silicon validation organization at Ambiq, driving post-silicon validation strategy for SoCs and edge AI products.

Ambiq Austin, Texas, United States Published 2 months ago
Ambiq

Join Ambiq as a Field Application Engineer to support customers in developing low-power semiconductor solutions.

Ambiq Remote Employee Published 4 months ago
Flexible on stack
Ricursive Intelligence

Lead IT and holistic security efforts at a pioneering AI lab focused on chip design and self-improving systems.

Ricursive Intelligence Palo Alto Published 7 months ago
SpaceX

Join SpaceX as an AMS Verification Engineer to develop cutting-edge RFICs for the Starlink network.

SpaceX Redmond, WA $125k–$200k/yr Published 3 weeks ago
Flexible on stack
Mythic

Join Mythic as an Architecture Modeling Engineer to develop designs for next-generation AI processors.

Mythic Austin, TX $120k–$225k/yr Published 1 year ago
SpaceX

Join SpaceX as a silicon engineering intern to work on custom silicon and hardware for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a silicon engineering intern to work on cutting-edge chip design and development for space applications.

SpaceX Flexible - Any SpaceX Site $30–$40/hr Published 1 month ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RF Front-End Module Design Engineer to develop advanced RF modules for the Starlink Mobile network.

SpaceX Sunnyvale, CA $170k–$235k/yr Published 3 months ago
Flexible on stack
SpaceX

Join SpaceX as a Sr. RF Front-End Module Design Engineer to develop cutting-edge RF modules for the Starlink Mobile network.

SpaceX Irvine, CA $160k–$225k/yr Published 3 months ago
Flexible on stack